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[Cortex-M0技术交流] 新手学习笔记4——SPI+ENC28J60（通过网页控制LED)

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 楼主| jxc827 发表于 2012-7-6 21:41 | 显示全部楼层 |阅读模式
网页控制, ENC28J60, 学习笔记, spi, 控制LED
本帖最后由 jxc827 于 2012-7-6 22:47 编辑

使用NUC120的SPI1口连接ENC28J60，实现网页控制LED的亮灭。
连线方式：CS——GPA13;  RST——GPA12;

工程直接利用网站上的例程进行修改，在此对作者表示感谢。

废话不多说，贴上部分程序：
hw_config.c
复制
  1. #include "includes.h" //包含所需的头文件
    


  2. 

  3. /*************************************************************************************
    

  4. ** Function name: Set_System
    

  5. ** Descriptions: 封装一些初始化模块
    

  6. ** input parameters: count
    

  7. ** output parameters: 无
    

  8. ** Returned value: 无
    

  9. *************************************************************************************/
    

  10. void Set_System(void)
    

  11. {
    

  12. RCC_Configuration(); //配置系统时钟
    


  13. 

  14. GPIO_Configuration(); //配置GPIO
    


  15. 

  16. SPI_Configuration(); //配置SPI1
    

  17. }
    

  18. /*************************************************************************************
    

  19. ** Function name: RCC_Configuration
    

  20. ** Descriptions: 系统时钟设置,使用PLL输出50M
    

  21. ** input parameters: none
    

  22. ** output parameters: none
    

  23. ** Returned value: none
    

  24. *************************************************************************************/
    

  25. void RCC_Configuration(void)
    

  26. {
    

  27. int32_t tmp;
    

  28. UNLOCKREG();
    

  29. DrvSYS_SetOscCtrl(E_SYS_XTL12M, 1); // 使能外部12M时钟源
    

  30. DrvSYS_SelectPLLSource(E_SYS_EXTERNAL_12M); //选择外部12M时钟源PLL
    

  31. DrvSYS_SetPLLMode(0); //PLL 正常模式
    

  32. tmp = DrvSYS_GetPLLContent(E_SYS_EXTERNAL_12M, 50000000); //设置PLL输出50M
    

  33. DrvSYS_SetPLLContent(tmp);
    

  34. DrvSYS_SelectHCLKSource(2); //0:12M;1:32K;2LL;
    

  35. tmp = DrvSYS_GetHCLKFreq(); //回读HCLK时钟频率 
    

  36. LOCKREG();
    

  37. }
    

  38. /*************************************************************************************
    

  39. ** Function name: GPIO_Configuration
    

  40. ** Descriptions: GPIO配置
    

  41. ** input parameters: none
    

  42. ** output parameters: none
    

  43. ** Returned value: none
    

  44. *************************************************************************************/
    

  45. void GPIO_Configuration()
    

  46. {
    

  47. DrvGPIO_Open( E_GPA, 13, E_IO_OUTPUT ); // SPI片选
    

  48. DrvGPIO_Open( E_GPA, 12, E_IO_OUTPUT ); // SPI复位
    

  49. DrvGPIO_Open( E_GPA, 2, E_IO_OUTPUT ); // LED灯控制
    


  50. 

  51. }
    


  52. 

  53. /*************************************************************************************
    

  54. ** Function name: SPI_Configuration
    

  55. ** Descriptions: SPI配置
    

  56. ** input parameters: none
    

  57. ** output parameters: none
    

  58. ** Returned value: none
    

  59. *************************************************************************************/
    

  60. void SPI_Configuration()
    

  61. {
    

  62. uint32_t tmp;
    

  63. DrvSPI_Open(eDRVSPI_PORT1, eDRVSPI_MASTER, eDRVSPI_TYPE1, 8,FALSE); 
    

  64. DrvSPI_SetEndian(eDRVSPI_PORT1, eDRVSPI_MSB_FIRST); //配置SPI1传输比特的顺序:优先发送/接收MSB 
    

  65. DrvSPI_DisableAutoSS(eDRVSPI_PORT1); //禁止自动片选功能 
    

  66. DrvSPI_SetSlaveSelectActiveLevel(eDRVSPI_PORT1, eDRVSPI_ACTIVE_LOW_FALLING); //设定从选择线的激活级别:低电平或者下降沿
    

  67. DrvSPI_Set2BitTransferMode(eDRVSPI_PORT1, FALSE); //禁止2比特串行数据I/O 模式
    

  68. DrvSPI_SetClockFreq(eDRVSPI_PORT1, 8000000, 0); //设置SPI的时钟频率为8MHz
    

  69. tmp = DrvSPI_GetClock1Freq(eDRVSPI_PORT1);
    


  70. 

  71. DISABLE_SPI_CS; //输出高电平
    

  72. }
    


  73. 

  74. /*************************************************************************************
    

  75. ** Function name: delay_ms
    

  76. ** Descriptions: 1ms(晶振为12MHZ)延时子程序
    

  77. ** input parameters: count
    

  78. ** output parameters: 无
    

  79. ** Returned value: 无
    

  80. *************************************************************************************/
    

  81. void delay_ms(uint32_t count)
    

  82. {
    

  83. uint32_t i,j;
    

  84. for(i=count;i>0;i--)
    

  85. for(j=2395;j>0;j--);
    

  86. }
    


  87. 

  88. /*************************************************************************************
    

  89. ** Function name: SPInet_ReadWrite
    

  90. ** Descriptions: SPI读写数据函数
    

  91. ** input parameters: 写入数据
    

  92. ** output parameters: 无
    

  93. ** Returned value: 读出数据
    

  94. *************************************************************************************/
    

  95. uint8_t SPInet_ReadWrite(uint8_t writedat)
    

  96. {
    

  97. uint32_t au32SourceData;
    

  98. uint32_t au32DestinationData; 
    


  99. 

  100. au32SourceData = writedat; 
    

  101. DrvSPI_SingleWrite(eDRVSPI_PORT1, &au32SourceData); 
    

  102. while (DrvSPI_IsBusy(eDRVSPI_PORT1)) {} //等待SPI端口空闲
    


  103. 

  104. DrvSPI_DumpRxRegister(eDRVSPI_PORT1, &au32DestinationData, 1);
    


  105. 

  106. return (au32DestinationData);
    

  107. }
ENC28J60.C
复制
  1. #include "includes.h"
    


  2. 

  3. static u8 Enc28j60Bank;
    

  4. static u16 NextPacketPtr;
    


  5. 


  6. 

  7. u8 enc28j60ReadOp(u8 op, u8 address)
    

  8. {
    

  9. u8 dat = 0;
    


  10. 

  11. ENC28J60_CSL();
    


  12. 

  13. dat = op | (address & ADDR_MASK);
    

  14. SPInet_ReadWrite(dat);
    

  15. dat = SPInet_ReadWrite(0x00);
    

  16. // do dummy read if needed (for mac and mii, see datasheet page 29)
    

  17. if (address & 0x80)
    

  18. {
    

  19. dat = SPInet_ReadWrite(0x00);
    

  20. }
    

  21. // release CS
    

  22. ENC28J60_CSH();
    

  23. return dat;
    

  24. }
    


  25. 

  26. void enc28j60WriteOp(u8 op, u8 address, u8 data)
    

  27. {
    

  28. u8 dat = 0;
    


  29. 

  30. ENC28J60_CSL();
    

  31. // issue write command
    

  32. dat = op | (address & ADDR_MASK);
    

  33. SPInet_ReadWrite(dat);
    

  34. // write data
    

  35. dat = data;
    

  36. SPInet_ReadWrite(dat);
    

  37. ENC28J60_CSH();
    

  38. }
    


  39. 

  40. void enc28j60ReadBuffer(u16 len, u8* data)
    

  41. {
    

  42. ENC28J60_CSL();
    

  43. // issue read command
    

  44. SPInet_ReadWrite(ENC28J60_READ_BUF_MEM);
    

  45. while (len--)
    

  46. {
    

  47. *data++ = (u8) SPInet_ReadWrite(0);
    

  48. }
    

  49. *data = '\0';
    

  50. ENC28J60_CSH();
    

  51. }
    


  52. 

  53. void enc28j60WriteBuffer(u16 len, u8* data)
    

  54. {
    

  55. ENC28J60_CSL();
    

  56. // issue write command
    

  57. SPInet_ReadWrite(ENC28J60_WRITE_BUF_MEM);
    


  58. 

  59. while (len--)
    

  60. {
    

  61. SPInet_ReadWrite(*data++);
    

  62. }
    

  63. ENC28J60_CSH();
    

  64. }
    


  65. 

  66. void enc28j60SetBank(u8 address)
    

  67. {
    

  68. // set the bank (if needed)
    

  69. if ((address & BANK_MASK) != Enc28j60Bank)
    

  70. {
    

  71. // set the bank
    

  72. enc28j60WriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1 | ECON1_BSEL0));
    

  73. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK) >> 5);
    

  74. Enc28j60Bank = (address & BANK_MASK);
    

  75. }
    

  76. }
    


  77. 

  78. u8 enc28j60Read(u8 address)
    

  79. {
    

  80. // set the bank
    

  81. enc28j60SetBank(address);
    

  82. // do the read
    

  83. return enc28j60ReadOp(ENC28J60_READ_CTRL_REG, address);
    

  84. }
    


  85. 

  86. void enc28j60Write(u8 address, u8 data)
    

  87. {
    

  88. // set the bank
    

  89. enc28j60SetBank(address);
    

  90. // do the write
    

  91. enc28j60WriteOp(ENC28J60_WRITE_CTRL_REG, address, data);
    

  92. }
    


  93. 

  94. void enc28j60PhyWrite(u8 address, u16 data)
    

  95. {
    

  96. // set the PHY register address
    

  97. enc28j60Write(MIREGADR, address);
    

  98. // write the PHY data
    

  99. enc28j60Write(MIWRL, data & 0x00ff);
    

  100. enc28j60Write(MIWRH, data >> 8);
    

  101. // wait until the PHY write completes
    

  102. while (enc28j60Read(MISTAT) & MISTAT_BUSY)
    

  103. {
    

  104. }
    

  105. }
    


  106. 

  107. void enc28j60clkout(u8 clk)
    

  108. {
    

  109. enc28j60Write(ECOCON, clk & 0x7);
    

  110. }
    


  111. 

  112. void enc28j60Init(u8 * macaddr)
    

  113. {
    

  114. unsigned char tmp=0;
    

  115. unsigned long i;
    


  116. 

  117. ENC28J60_RSTL();
    

  118. delay_ms(1000);
    

  119. ENC28J60_RSTH();
    

  120. delay_ms(1000); //必须延迟一段时间
    


  121. 

  122. // perform system reset
    

  123. enc28j60WriteOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
    


  124. 

  125. // Del_1ms(250);
    

  126. // check CLKRDY bit to see if reset is complete
    

  127. // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
    

  128. //while(!(enc28j60Read(ESTAT) & ESTAT_CLKRDY));
    

  129. // do bank 0 stuff
    

  130. // initialize receive buffer
    

  131. // 16-bit transfers, must write low byte first
    

  132. // set receive buffer start address
    

  133. NextPacketPtr = RXSTART_INIT;
    

  134. // Rx start
    

  135. enc28j60Write(ERXSTL, RXSTART_INIT & 0xFF);
    

  136. enc28j60Write(ERXSTH, RXSTART_INIT >> 8);
    

  137. // set receive pointer address
    

  138. enc28j60Write(ERXRDPTL, RXSTART_INIT & 0xFF);
    

  139. enc28j60Write(ERXRDPTH, RXSTART_INIT >> 8);
    

  140. // RX end
    

  141. enc28j60Write(ERXNDL, RXSTOP_INIT & 0xFF);
    

  142. enc28j60Write(ERXNDH, RXSTOP_INIT >> 8);
    

  143. // TX start
    

  144. enc28j60Write(ETXSTL, TXSTART_INIT & 0xFF);
    

  145. enc28j60Write(ETXSTH, TXSTART_INIT >> 8);
    

  146. // TX end
    

  147. enc28j60Write(ETXNDL, TXSTOP_INIT & 0xFF);
    

  148. enc28j60Write(ETXNDH, TXSTOP_INIT >> 8);
    

  149. // do bank 1 stuff, packet filter:
    

  150. // For broadcast packets we allow only ARP packtets
    

  151. // All other packets should be unicast only for our mac (MAADR)
    

  152. //
    

  153. // The pattern to match on is therefore
    

  154. // Type ETH.DST
    

  155. // ARP BROADCAST
    

  156. // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
    

  157. // in binary these poitions are:11 0000 0011 1111
    

  158. // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
    

  159. enc28j60Write(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN);
    

  160. enc28j60Write(EPMM0, 0x3f);
    

  161. enc28j60Write(EPMM1, 0x30);
    

  162. enc28j60Write(EPMCSL, 0xf9);
    

  163. enc28j60Write(EPMCSH, 0xf7);
    

  164. //
    

  165. //
    

  166. // do bank 2 stuff
    

  167. // enable MAC receive
    

  168. enc28j60Write(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
    

  169. // bring MAC out of reset
    

  170. enc28j60Write(MACON2, 0x00);
    

  171. // enable automatic padding to 60bytes and CRC operations
    

  172. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
    

  173. // set inter-frame gap (non-back-to-back)
    

  174. enc28j60Write(MAIPGL, 0x12);
    

  175. enc28j60Write(MAIPGH, 0x0C);
    

  176. // set inter-frame gap (back-to-back)
    

  177. enc28j60Write(MABBIPG, 0x12);
    

  178. // Set the maximum packet size which the controller will accept
    

  179. // Do not send packets longer than MAX_FRAMELEN:
    

  180. enc28j60Write(MAMXFLL, MAX_FRAMELEN & 0xFF); 
    

  181. enc28j60Write(MAMXFLH, MAX_FRAMELEN >> 8);
    

  182. // do bank 3 stuff
    

  183. // write MAC address
    

  184. // NOTE: MAC address in ENC28J60 is byte-backward
    

  185. enc28j60Write(MAADR5, macaddr[0]); 
    

  186. enc28j60Write(MAADR4, macaddr[1]);
    

  187. enc28j60Write(MAADR3, macaddr[2]);
    

  188. enc28j60Write(MAADR2, macaddr[3]);
    

  189. enc28j60Write(MAADR1, macaddr[4]);
    

  190. enc28j60Write(MAADR0, macaddr[5]);
    


  191. 

  192. // printf("MAADR5 = 0x%x\r\n", enc28j60Read(MAADR5));
    

  193. // printf("MAADR4 = 0x%x\r\n", enc28j60Read(MAADR4));
    

  194. // printf("MAADR3 = 0x%x\r\n", enc28j60Read(MAADR3));
    

  195. // printf("MAADR2 = 0x%x\r\n", enc28j60Read(MAADR2));
    

  196. // printf("MAADR1 = 0x%x\r\n", enc28j60Read(MAADR1));
    

  197. // printf("MAADR0 = 0x%x\r\n", enc28j60Read(MAADR0));
    


  198. 

  199. enc28j60PhyWrite(PHCON1, PHCON1_PDPXMD); 
    


  200. 

  201. // no loopback of transmitted frames
    

  202. enc28j60PhyWrite(PHCON2, PHCON2_HDLDIS); // switch to bank 0
    

  203. enc28j60SetBank(ECON1);
    

  204. // enable interrutps
    

  205. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE | EIE_PKTIE);
    


  206. 

  207. // enable packet reception
    

  208. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
    


  209. 

  210. }
    


  211. 

  212. // read the revision of the chip:
    

  213. u8 enc28j60getrev(void)
    

  214. {
    

  215. return(enc28j60Read(EREVID));
    

  216. }
    


  217. 

  218. void enc28j60PacketSend(u16 len, u8* packet)
    

  219. {
    

  220. // Set the write pointer to start of transmit buffer area
    

  221. enc28j60Write(EWRPTL, TXSTART_INIT & 0xFF);
    

  222. enc28j60Write(EWRPTH, TXSTART_INIT >> 8);
    


  223. 

  224. // Set the TXND pointer to correspond to the packet size given
    

  225. enc28j60Write(ETXNDL, (TXSTART_INIT + len) & 0xFF);
    

  226. enc28j60Write(ETXNDH, (TXSTART_INIT + len) >> 8);
    


  227. 

  228. // write per-packet control byte (0x00 means use macon3 settings)
    

  229. enc28j60WriteOp(ENC28J60_WRITE_BUF_MEM, 0, 0x00);
    


  230. 

  231. // copy the packet into the transmit buffer
    

  232. enc28j60WriteBuffer(len, packet);
    


  233. 

  234. // send the contents of the transmit buffer onto the network
    

  235. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
    


  236. 

  237. // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
    

  238. if ((enc28j60Read(EIR) & EIR_TXERIF))
    

  239. {
    

  240. enc28j60WriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
    

  241. }
    

  242. }
    


  243. 

  244. /*-----------------------------------------------------------------
    

  245. Gets a packet from the network receive buffer, if one is available.
    

  246. The packet will by headed by an ethernet header.
    

  247. maxlen The maximum acceptable length of a retrieved packet.
    

  248. packet Pointer where packet data should be stored.
    

  249. Returns: Packet length in bytes if a packet was retrieved, zero otherwise.
    

  250. -------------------------------------------------------------------*/
    

  251. u16 enc28j60PacketReceive(u16 maxlen, u8* packet)
    

  252. {
    

  253. u16 rxstat;
    

  254. u16 len;
    


  255. 

  256. // check if a packet has been received and buffered
    

  257. //if( !(enc28j60Read(EIR) & EIR_PKTIF) ){
    

  258. // The above does not work. See Rev. B4 Silicon Errata point 6.
    

  259. if (enc28j60Read(EPKTCNT) == 0)
    

  260. {
    

  261. return(0);
    

  262. }
    


  263. 

  264. // Set the read pointer to the start of the received packet
    

  265. enc28j60Write(ERDPTL, (NextPacketPtr));
    

  266. enc28j60Write(ERDPTH, (NextPacketPtr) >> 8);
    


  267. 

  268. // read the next packet pointer
    

  269. NextPacketPtr = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0);
    

  270. NextPacketPtr |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0) << 8;
    


  271. 

  272. // read the packet length (see datasheet page 43)
    

  273. len = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0);
    

  274. len |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0) << 8;
    


  275. 

  276. len -= 4; //remove the CRC count
    

  277. // read the receive status (see datasheet page 43)
    

  278. rxstat = enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0);
    

  279. rxstat |= enc28j60ReadOp(ENC28J60_READ_BUF_MEM, 0) << 8;
    

  280. // limit retrieve length
    

  281. if (len > maxlen - 1)
    

  282. {
    

  283. len = maxlen - 1;
    

  284. }
    


  285. 

  286. // check CRC and symbol errors (see datasheet page 44, table 7-3):
    

  287. // The ERXFCON.CRCEN is set by default. Normally we should not
    

  288. // need to check this.
    

  289. if ((rxstat & 0x80) == 0)
    

  290. {
    

  291. // invalid
    

  292. len = 0;
    

  293. }
    

  294. else
    

  295. {
    

  296. // copy the packet from the receive buffer
    

  297. enc28j60ReadBuffer(len, packet);
    

  298. }
    

  299. // Move the RX read pointer to the start of the next received packet
    

  300. // This frees the memory we just read out
    

  301. enc28j60Write(ERXRDPTL, (NextPacketPtr));
    

  302. enc28j60Write(ERXRDPTH, (NextPacketPtr) >> 8);
    


  303. 

  304. // decrement the packet counter indicate we are done with this packet
    

  305. enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
    

  306. return(len);
    

  307. }
    


  308. 


  309. 


  310.
main.c
复制
  1. /*---------------------------------------------------------------------------------------------------------*/
    

  2. /* */
    

  3. /* Copyright(c) 2011 Nuvoton Technology Corp. All rights reserved. */
    

  4. /* */
    

  5. /*---------------------------------------------------------------------------------------------------------*/
    

  6. #include "includes.h" //包含所需的头文件
    

  7. /*************************************************************************************
    

  8. ** Function name: main
    

  9. ** Descriptions: 默认IP地址： 192. 168. 1.100 
    

  10. ** input parameters: 无
    

  11. ** output parameters: 无
    

  12. ** Returned value: 无
    

  13. *************************************************************************************/
    

  14. int main (void)
    

  15. { 
    

  16. unsigned char tmp = 0;
    

  17. Set_System(); //系统初始化
    


  18. 

  19. simple_server(); //简单网页服务器 
    

  20. }
    


  21.
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john_lee 发表于 2012-7-6 21:57 | 显示全部楼层
这个必须穿裤子
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 楼主| jxc827 发表于 2012-7-6 22:06 | 显示全部楼层
第一次穿裤子，受宠若惊啊！
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abin0415 发表于 2012-7-7 22:09 | 显示全部楼层
这个必须顶
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xyz549040622 发表于 2012-7-8 07:30 | 显示全部楼层
这个厉害，记住，我要试试
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neo_bright 发表于 2012-7-8 23:47 | 显示全部楼层
thanks
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kyzb001 发表于 2012-7-9 08:42 | 显示全部楼层
难道传来传去就这一个 工程？
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 楼主| jxc827 发表于 2012-7-12 12:35 | 显示全部楼层
新手请谅解。
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KFYSX 发表于 2012-7-17 17:53 | 显示全部楼层
怎么回事？
在浏览器中输入：http://192.168.1.100/
显示：
http://192.168.1.100/
在浏览器中输入：http://192.168.1.100/888/1
显示：
[url=http://192.168.1.100/888http://192.168.1.100/888]http://192.168.1.100/888http://192.168.1.100/888[/url]
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KFYSX 发表于 2012-7-17 17:54 | 显示全部楼层
怎么回事？
在浏览器中输入：http://192.168.1.100/

显示：
http://192.168.1.100/

在浏览器中输入：http://192.168.1.100/888/1

显示：
http://192.168.1.100/888http://192.168.1.100/888
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myfish 发表于 2012-9-2 20:32 | 显示全部楼层
学习学习~~~~
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lwslws201 发表于 2012-9-10 19:57 | 显示全部楼层
这个是野火的历程修改过来的！
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rejoice818 发表于 2012-9-12 13:11 | 显示全部楼层
smartmcu也有相关例程，还配套上下位机的源码。
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lu0718 发表于 2012-9-12 20:24 | 显示全部楼层
顶LZ
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夏末一直很在乎 发表于 2013-7-23 15:06 | 显示全部楼层
学习学习
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cgd 发表于 2013-7-23 16:16 | 显示全部楼层
酷
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ilee123 发表于 2013-8-14 21:57 | 显示全部楼层
回贴才是乖孩子
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chengshaobin 发表于 2016-5-27 18:32 | 显示全部楼层
你好，有些问题想咨询一下您 方便的话加个企鹅吧？
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