本帖最后由 xiaolin4006 于 2015-9-12 20:40 编辑
非常感谢你的回复，我的电源确实没有进行排序，因之前参考了SNOWLEO开发板，它的电源部分为同步上电。所以没有仔细考虑上电顺序这块，刚仔细看了一下datasheet，上电顺序要求还比较复杂，下面为原文：
PS Power-On/Off Power Supply Sequencing
The recommended power-on sequence is VCCPINT, VCCPAUX, and VCCPLL together, then the PS VCCO supplies (VCCO_MIO0,
VCCO_MIO1, and VCCO_DDR) to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. The
recommended power-off sequence is the reverse of the power-on sequence. If VCCPAUX, VCCPLL, and the PS VCCO supplies
(VCCO_MIO0, VCCO_MIO1, and VCCO_DDR) have the same recommended voltage levels, then they can be powered by the
same supply and ramped simultaneously. Xilinx recommends powering VCCPLL with the same supply as VCCPAUX, with an
optional ferrite bead filter.
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PL Power-On/Off Power Supply Sequencing
The recommended power-on sequence for the PL is VCCINT, VCCBRAM, VCCAUX, and VCCO to achieve minimum current draw
and ensure that the I/Os are 3-stated at power-on. The recommended power-off sequence is the reverse of the power-on
sequence. If VCCINT and VCCBRAM have the same recommended voltage levels then both can be powered by the same
supply and ramped simultaneously. If VCCAUX and VCCO have the same recommended voltage levels then both can be
powered by the same supply and ramped simultaneously.
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GTP Transceivers (XC7Z015 Only)
The recommended power-on sequence to achieve minimum current draw for the GTP transceivers (XC7Z015 only) is
VCCINT, VMGTAVCC, VMGTAVTT OR VMGTAVCC, VCCINT, VMGTAVTT. Both VMGTAVCC and VCCINT can be ramped simultaneously.
The recommended power-off sequence is the reverse of the power-on sequence to achieve minimum current draw.
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上文可以看到PS和PL还有GTP上电都是有要求的。
我的板子ZYNQ的电源有四种1.0,1.2，1.8，3.3，前面三个都是由3.3转换的，并且是同时上电，而3.3作为PL的VCCO用的是PCIe插槽的电源，因此3.3肯定是先上电了，这些肯定都不符合要求，现在考虑非常有可能是这个引起的器件工作不可靠。但是目前又无法验证。只是有一点不明白，是什么把PC机拉垮掉的。板卡和PC机之间只有PCIE和电源连接，难道是主板保护了？直到板卡正常了才解除保护?
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