.title "Flash bootup utility for DM642 EVM"<br /> .option D,T<br /> .length 102<br /> .width 140<br /><br />COPY_TABLE .equ 0x90000400<br />EMIF_BASE .equ 0x01800000<br /><br /> .sect ".boot_load"<br /> .global _boot<br /> .global _my_reset<br /> .ref _c_int00<br /><br />_boot: <br />;************************************************************************<br />;* Debug Loop - Comment out B for Normal Operation<br />;************************************************************************<br /><br /> zero B1<br />_myloop: ; [!B1] B _myloop <br /> nop 5<br />_myloopend: nop<br /><br />;************************************************************************<br />;* Configure EMIF<br />;************************************************************************<br /><br /> mvkl emif_values, a3 ; load pointer to emif values<br /> mvkh emif_values, a3<br /> <br /> mvkl EMIF_BASE, a4 ; load EMIF base address<br /> mvkh EMIF_BASE, a4<br /><br /> mvkl 0x0009, b0 ; load number of registers to set<br /> mvkh 0x0000, b0<br /><br />emif_loop:<br /> ldw *a3++, b5 ; load register value<br /> sub b0,1,b0 ; decrement counter<br /> nop 2<br /> [ b0] b emif_loop<br /> stw b5, *a4++ ; store register value<br /> nop 4 <br /><br />;****************************************************************************<br />;* Copy code sections<br />;****************************************************************************<br /> mvkl COPY_TABLE, a3 ; load table pointer<br /> mvkh COPY_TABLE, a3<br /><br /> ldw *a3++, b1 ; Load entry point<br /><br />copy_section_top:<br /> ldw *a3++, b0 ; byte count <br /> ldw *a3++, a4 ; ram start address<br /> nop 3<br /><br /> [!b0] b copy_done ; have we copied all sections?<br /> nop 5<br /><br />copy_loop:<br /> ldb *a3++,b5<br /> sub b0,1,b0 ; decrement counter<br /> [ b0] b copy_loop ; setup branch if not done<br /> [!b0] b copy_section_top<br /> zero a1<br /> [!b0] and 3,a3,a1<br /> stb b5,*a4++<br /> [!b0] and -4,a3,a5 ; round address up to next multiple of 4<br /> [ a1] add 4,a5,a3 ; round address up to next multiple of 4<br /><br />;****************************************************************************<br />;* Jump to entry point<br />;****************************************************************************<br />copy_done:<br /> b .S2 b1<br /> nop 5<br /><br />emif_values:<br /> <br /> .long 0x000520f8 ; GBLCTL<br /> .long 0xfff1d10b ; CECTL1 (Flash/FPGA)<br /> .long 0xffffffd3 ; CECTL0 (SDRAM)<br /> .long 0x00000000 ; Reserved<br /> .long 0xffffff03 ; CECTL2<br /> .long 0xffffff03 ; CECTL3<br /> .long 0x57119000 ; SDCTL<br /> .long 0x00000446 ; SDTIM (refresh period)<br /> .long 0x0005452b ; SDEXT<br /><br />; .long 0x00052078 ; GBLCTL<br /> ; .long 0x73a28e01 ; CECTL1 (Flash/FPGA)<br />; .long 0xffffffd3 ; CECTL0 (SDRAM)<br />; .long 0x00000000 ; Reserved<br />; .long 0x22a28a22 ; CECTL2<br />; .long 0x22a28a22 ; CECTL3<br />; .long 0x57115000 ; SDCTL<br />; .long 0x0000081b ; SDTIM (refresh period)<br />; .long 0x001faf4d ; SDEXT<br /> <br /> <br /> <br /> <br /> .sect ".reset"<br /> <br />_my_reset:<br /> <br /> mvkl _c_int00, b1 ; reset<br /> mvkh _c_int00, b1<br /> nop 5<br /> b .S2 b1<br /> nop 5
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