| 
 
| 在EPWM中初始化了各子模块,具体如下: EPwm1Regs.TBPRD = 1500; //1430;//                       // 20kHz        //1430=21k
 EPwm1Regs.TBPHS.half.TBPHS = 0x0000;            // Phase is 0
 EPwm1Regs.TBCTR = 0x0000;                       // Clear counter
 EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;  // Count up to down
 EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;         // Disable phase loading
 EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;        // Clock ratio to SYSCLKOUT
 EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;           //
 EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
 。。。。。。
 
 if((wCurrentRef >= 2048) && (dwVoltOutTemp < 0))        //area4
 {
 if(dwVoltOutTemp > -50)
 {
 dwVoltOutTemp = -50;
 }
 EPwm1Regs.CMPA.half.CMPA = -dwVoltOutTemp;
 EPwm1Regs.CMPB = 1500;
 }
 请问当条件满足时输出的模型是怎么样的?
 | 
 |