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程序如下<br /><br />SRAM是通过地址加数据，用8080时序完成的， 我想用CPLD转成类似6800时序的操作。 <br /><br />写数据时，在e的下降沿下， 第一次送高位地址，第二次是低位地址，第三次是数据，再有两次来产生SRAM的写信号。<br /><br />读数据与上面方式类似，只是后面产生SRAM的读信号。<br /><br />程序编译时停在<br />temp <= Internal_bus1;<br />RamDa<=temp;<br />和<br />hostda<=Internal_bus2;<br /><br />这里，RamDa是cpld到sram的数据口，hostda是单片机到CPLD的数据口，两个为双向口。<br /><br />这个是怎么回事啊，要怎么改好呢？<br /><br /><br />module ram(e, rw, rst, hostda, RamAddrH, RamAddrL, RamDa, RamWr, RamRd);<br /> input e;<br /> input rw;<br /> input rst;<br /> inout [7:0] hostda;<br /> output [7:0] RamAddrH;<br /> output [7:0] RamAddrL;<br /> inout [7:0] RamDa;<br /> output RamWr;<br /> output RamRd;<br /> <br />reg [7:0] RamAddrH;<br />reg [7:0] RamAddrL;<br />reg RamWr;<br />reg RamRd;<br />integer temp;<br /><br />reg [7:0] Internal_bus1;<br />reg [7:0] Internal_bus2;<br />reg [3:0] e_counter;<br />assign hostda=(rw==0)?Internal_bus1:8'bz;<br />assign RamDa=(rw==1)?Internal_bus2:8'bz;<br /><br />always @(negedge e or rw)<br />begin<br /> if(rst==0)<br /> begin<br /> RamAddrH=0;<br /> RamAddrL=0;<br /> RamWr=1;<br /> RamRd=1;<br /> e_counter<=0;<br /> end<br /> else<br /> begin<br /> if(rw==0)<br /> begin<br /> e_counter<=e_counter+1;<br /> if(e_counter==1)<br /> begin<br /> RamAddrH<=Internal_bus1;<br /> end<br /> <br /> if(e_counter==2)<br /> begin<br /> RamAddrL<=Internal_bus1;<br /> end<br /> <br /> if(e_counter==3)<br /> begin<br /> ////RamDa<=Internal_bus1;<br /> temp <= Internal_bus1;<br /> RamDa<=temp;<br /> end<br /> <br /> if(e_counter==4)<br /> begin<br /> RamWr<=0;<br /> end<br /> <br /> if(e_counter==5)<br /> begin<br /> RamWr<=1;<br /> e_counter<=0;<br /> end<br /> end<br /> else<br /> begin<br /> e_counter<=e_counter+1;<br /> if(e_counter==1)<br /> begin<br /> RamAddrH<=Internal_bus1;<br /> end<br /> <br /> if(e_counter==2)<br /> begin<br /> RamAddrL<=Internal_bus1;<br /> end<br /> <br /> if(e_counter==3)<br /> begin<br /> RamRd<=0;<br /> end<br /> <br /> if(e_counter==4)<br /> begin<br /> hostda<=Internal_bus2;<br /> end<br /> <br /> if(e_counter==5)<br /> begin<br /> RamRd<=1;<br /> e_counter<=0;<br /> end<br /> end<br />end<br />end <br /><br />endmodule |
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