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关于TI的DSP的EMIF接口的速度问题<br /><br />我看到论坛上很多网友遇到与我类似的问题，就是使用DSP的EMIF接口进行数据存储时速度受限，包括用DMA的方式速度没有本质性的提高，用示波器观察读/写信号大概也只有5MHZ左右。<br />我跟TI的工程师交流过，他们给出的解释很牵强，也没有提出可行的解决方案。不知道哪位解决或者能够明确的解释这个问题？希望与我探讨。dcx926@163.com<br />下面是我与TI工程程师的email：<br />Ti工程师的回答：<br />Hi Chong,<br /><br />Well there is no definite value for the latency that can be provided. That is why I had asked to perform IBIS modelling to assess the performance <br />while connecting a memeory device to the DSP. And then regarding the wait states,they are automatically inserted by th CPU. During the execution of a program in which the instructions run in parallel, owing to pipeline, the CPU adds nops to flush the pipeline. So at that time, the CPU cannot access the external memeory bus. So there will be no activity on the external memory. So even if the EMIF clock is clocking, the CPU cannot access the external memory. Now no one can really gauge what exactly is going on the pipeline.So these delays may vary given the state of the pipeline. <br /><br />And well there are programmable wiatstate registers in case of C55xx. However if you want to insert wiat states, then you will have to write a software delay or you will ahve to make use of hardware timer to porvide the desired delay.<br /><br />我的咨询：<br />工程师先生：<br /> 您好！我在项目开发中用到TI的dsp tms320vc5502。在调试外部ＳＢＳＲＡＭ时遇到以下问题，希望能从您这里获得支持！<br /> 首先ｄｓｐ设置如下：倍频后，cpu core clock为１００ＭＨＺ, EMIF clock(SYSCLK3)为100MHZ，即外部同步静态RAM的时钟为100MHZ。将SBSRAM所在的空间CE2相关寄存器设置如下：在EMIF_Config中配置，EMIF CE2 Space Control Register1 = 0xC040；EMIF CE2 Space Control Register2 = 0x0000；EMIF CE2 Space Secondary Control Register1= 0x0042. <br />经实验可以正确的对SBSRAM进行读写操作。<br /> 问题：我在C中调用汇编函数进行循环的写操作，来检测写操作的时序，用示波器观察发现写信号SWE（或者 SADS）之间的时间间隔是11个 EMIF时钟周期（对应ECLOKOUT2的11个周期）。按照TI的使用手册，汇编语句 MOV AC1, *(#400000h)应该消耗一个时钟周期，为什么连续的两次写信号之间有11个时钟周期的间隔呢？ <br /> 之前得到你们很好的技术服务，现在该部分的设计关系到整个项目，希望得到您一如既往地支持！非常感谢！<br /> 西安交通大学 段崇修<br />代码如下： <br /> EMIF_Config MyEmifConfig = {//这里仅列出了与CE2空间相关的寄存器的配置<br /> .......<br /> EMIF_CE2CTL1_RMK( //EMIF CE2 Space Control Register1 <br /> EMIF_CE2CTL1_TA_DEFAULT,<br /> EMIF_CE2CTL1_READ_STROBE_OF(0), <br /> EMIF_CE2CTL1_MTYPE_32BIT_SBSRAM,<br /> EMIF_CE2CTL1_WRITE_HOLD_MSB_LOW,<br /> EMIF_CE2CTL1_READ_HOLD_OF(0)<br /> ,<br /> EMIF_CE2CTL2_RMK( //EMIF CE2 Space Control Register2 <br /> EMIF_CE2CTL2_WRITE_SETUP_OF(0),<br /> EMIF_CE2CTL2_WRITE_STROBE_OF(0),<br /> EMIF_CE2CTL2_WRITE_HOLD_OF(0),<br /> EMIF_CE2CTL2_READ_SETUP_OF(0)<br /> ,<br /> ........<br /><br /> EMIF_CE2SEC1_RMK( // CE2 Secondary Control Register 1<br /> EMIF_CE2SEC1_SNCCLK_SYNC_ECLKOUT2, <br /> EMIF_CE2SEC1_REN_ADS, <br /> EMIF_CE2SEC1_CEEXT_DEFAULT, <br /> EMIF_CE2SEC1_SYNCWL_0CYCLES,<br /> EMIF_CE2SEC1_SYNCRL_2CYCLES<br /> , <br /> ........<br /> EMIF_CESCR_DEFAULT // CE Size Control Register <br /> }; <br /> main()<br /> { <br /> /*初始化CSL库*/ <br /> CSL_init(); <br /> /*设置系统的运行速度为100MHz*/<br /> PLL_config(&MyPllConfig);<br /> /*EMIF为全EMIF接口*/<br /> CHIP_RSET(XBSR,0x0001); <br /> /*初始化DSP的EMIF接口*/<br /> EMIF_config(&MyEmifConfig);<br /> /* 写SBSRAM*/<br /> while(1)<br /> {<br /> savedata(); //调用汇编函数<br /> }<br /> } <br /><br /> ;汇编函数 <br /> _savedata:<br /> RPT #5000 ;单次循环次数<br /> MOV AC1, *(#400000h) ;#400000h为CE2空间的地址<br /> RET<br /> |
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