[Quartus] Spartan-6 FPGA Configurable Logic Block

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 楼主| sherry88 发表于 2010-8-25 10:09 | 显示全部楼层 |阅读模式
Spartan-6 FPGA Configurable Logic Block
The Configurable Logic Blocks (CLBs) are the main logic resources for implementing sequential as well as combinatorial circuits. Each CLB element is connected to a switch matrix for access to the general routing matrix (shown in Figure 1). A CLB element contains a pair of slices. These two slices do not have direct connections to each other, and each slice is organized as a column. For each CLB, the slice in the bottom of the CLB is labeled as SLICE(0), and the slice in the top of the CLB is labeled as SLICE(1).

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