oserdes_data : oserdes
generic map (
DATA_RATE_OQ => "DDR",
DATA_RATE_TQ => "DDR",
DATA_WIDTH => 4,
INIT_OQ => '0',
INIT_TQ => '0',
SERDES_MODE => "MASTER",
SRVAL_OQ => '0',
SRVAL_TQ => '0',
TRISTATE_WIDTH => 1
)
port map (
oq => dac_data_prebuf(i),
shiftout1 => open,
shiftout2 => open,
tq => open,
clk => clk_122_88MHz,
clkdiv => clk_61_44MHz,
d1 => dac_din_i(i + 8),
d2 => dac_din_i(i),
d3 => dac_din_q(i + 8),
d4 => dac_din_q(i),
d5 => '0',
d6 => '0',
oce => '1',
rev => '0',
shiftin1 => '0',
shiftin2 => '0',
sr => io_rst,
t1 => '0',
t2 => '0',
t3 => '0',
t4 => '0',
tce => '0'
);
是这东西吗
|
楼主
