STM32软件复位问题。
系统运行中我想软件复位，看了CortexM3手册上说明：
代码如下下面：
*(unsigned long*)0xE000ED0C |= 0x04;
但是系统仍然不复位
CortexM3手册上相关说明
P6-7
System reset
A system or warm reset initializes the majority of the macrocell, excluding the NVIC
debug logic, Flash Patch and Breakpoint (FPB), Data Watchpoint and Trigger (DWT),
and Instruction Trace Macrocell (ITM). System reset is typically used for resetting a
system that has been operating for some time, for example, watchdog reset.
Because the SYSRESETn signal is synchronized within the processor, you do not have
to synchronize this signal. Figure 6-3 shows the reset synchronization.
Cortex-M3 exports a signal, SYSRESETREQ, that is asserted when the
SYSRESETREQ bit of the Application Interrupt and Reset Control Register is set.
This can be used, for example, as an input to a watchdog timer as shown in Figure 6-1
on page 6-6
P8-21
Application Interrupt and Reset Control Register
Use the Application Interrupt and Reset Control Register to:
? determine data endianness
? clear all active state information for debug or to recover from a hard failure
? execute a system reset
? alter the priority grouping position (binary point).
The register address, access type, and Reset state are:
Address 0xE000ED0C
Access Read/write
Reset state 0x00000000
[2] SYSRESETREQ |
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