如果您看了N遍手册,应该看到STM32参考手册(RM0008)的第一页中有这样一句话: For information on the ARM Cortex-M3 core, please refer to the Cortex-M3 Technical Reference Manual.
在RM0008的第8章“Interrupts and events”中,第8.1节的结尾有这样的一句话: All interrupts including the core exceptions are managed by the NVIC. For more information on exceptions and NVIC programming see Chap 5 Exceptions & Chap 8 Nested Vectored Interrupt Controller of the ARM Cortex-M3 Technical Reference Manual.
For MORE information on exceptions and NVIC programming see Chap 5 Exceptions & Chap 8 Nested Vectored Interrupt Controller of the ARM Cortex-M3 Technical Reference Manual.