11.3.5 Interrupt control The UART has a single interrupt request line, called UARTn_interrupt. The status bits in the UARTn_SR register determine the cause of the interrupt. UARTn_interrupt will go high when a status bit is 1 (high) and the corresponding bit in the UARTn_IER register is 1 (see Figure 67). Note: The UARTn_Status register is read only. The UART_Status bits can only be cleared by operating on the FIFOs. The RxFIFO and TxFIFO can be reset by writing to the UARTn_RxReset and UARTn_TxReset registers.