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好好看一下资料，这两个位的定义<br /><br />PWMF — PWM Reload Flag<br />This read/write bit is set at the beginning of every reload cycle regardless of the state of the LDOK bit.<br />This bit is cleared by reading PWM control register 1 with the PWMF flag set, then writing a logic 0 to<br />PWMF. If another reload occurs before the clearing sequence is complete, then writing logic 0 to<br />PWMF has no effect.<br />1 = New reload cycle began.<br />0 = New reload cycle has not begun.<br /><br />This read/write bit loads the prescaler bits of the PMCTL2 register and the entire PMMODH/L and<br />PWMVALH/L registers into a set of buffers. The buffered prescaler divisor, PWM counter modulus<br />value, and PWM pulse will take effect at the next PWM load. Set LDOK by reading it when it is logic 0<br />and then writing a logic 1 to it. LDOK is automatically cleared after the new values are loaded or can<br />be manually cleared before a reload by writing a 0 to it. Reset clears LDOK.<br />1 = Load prescaler, modulus, and PWM values.<br />0 = Do not load new modulus, prescaler, and PWM values.<br /><br />
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