求助！MSP430F1232程序移植到MSP430F2132不运行 !

只看该作者 · 2015-10-21 07:58

//
// Set DCO Frequency
//
void setDCO(unsigned long freq)
{
  unsigned char old_BCSCTL1;
  unsigned int old_TACCTL2;
  unsigned int old_TACTL;
  unsigned int clkCnt;
  unsigned int numDcoClks;
  unsigned int prevCnt = 0;

  // PUC value for DCOx = 3
  // PUC value for RSELx = 4

  old_BCSCTL1 = BCSCTL1;                   // Save current BCSCTL1 setting
  old_TACCTL2 = TACCTL2;                   // Save current TACCTL2 setting
  old_TACTL = TACTL;                   // Save current TACTL setting

  // Basic Clock System Control Register 1
  BCSCTL1 |= XTS;

  numDcoClks = freq/4096;                // Number of DCO clocks in one
                                          // ACLK/8 period

  // Timer_A Capture/Compare Control Register
  TACCTL2 = CM_1 + CCIS_1 + CAP;          // Capture on rising Edge
                                          // Capture input is CCI2B = ACLK
                                          // Async capture
                                          // Capture mode
                                          // Output mode is OUT bit
                                          // Interrupt disabled
                                          // OUT bit is 0
                                          // Clear capture overflow bit (COV)
                                          // Clear interrupt flag (CCIFG)

  // Timer A Control Register
  TACTL = TASSEL_2 + MC_2 + TACLR;       // Clk src is SmaciLK
                                          // Input clock divider is 1
                                          // Continuous mode
                                          // Reset
                                          // Interrupt is disabled
                                          // Clear interrupt flag (TAIFG)

  while(1)
  {
while( !(TACCTL2 & CCIFG) );          // Wait for capture event

TACCTL2 &= ~CCIFG;                   // Capture occured, clear flag

clkCnt = TACCR2 - prevCnt;             // Num of clks since last capture

prevCnt = TACCR2;                      // Save current clock count

if( (numDcoClks <= (clkCnt + 2)) && (numDcoClks >= (clkCnt - 2))  )
{
   break;
}
else if( clkCnt > numDcoClks )       // DCO is too fast, slow it down
{
   DCOCTL--;

   if( DCOCTL == 0xFF )
   {
      if( BCSCTL1 & 0x07 )
      {
      BCSCTL1--;                      // DCO role under?, dec RSEL
      }
      else
      {
      break;                         // Error condition, break loop
      }
   }
}
else                                  // DCO is too slow, speed it up
{
   DCOCTL++;

   if( DCOCTL == 0x00 )
   {
      if( (BCSCTL1 & 0x07) != 0x07 )
      {
      BCSCTL1++;                      // DCO role over? higher RSEL
      }
      else
      {
      break;                         // Error condition, break loop
      }
   }
}
  }

  // Stop Timer_A
  TACTL = 0;
  TACCTL2 = 0;

  // Restore original values
  BCSCTL1 = old_BCSCTL1;
  TACCTL2 = old_TACCTL2;
  TACTL = old_TACTL;
}

//
// Configure USART0 for UART mode
//
void configUart0(void)
{
  P3SEL |= 0x30;                         // P3.4,5 = UTXD0/URXD0
  ME2 |= UTXE0 + URXE0;                   // Enable USART0 TXD/RXD
  UCTL0 |= (CHAR + PENA + PEV + SWRST);    // 8-bit char, even parity, reset
  UTCTL0 |= SSEL1;                         // BRCLK = SmaciLK
  UBR00 = 0x6d;                            // 9600 from 1MHz
  UBR10 = 0x00;                            //
  UMCTL0 = 0x03;                         // Modulation
  UCTL0 &= ~SWRST;                         // Initialize USART state machine
  IE2 |= URXIE0;                         // Enable USART0 RX interrupt
}

改后
//
// Configure USART0 for UART mode
//
void configUart0(void)
{
  P3SEL = 0x30;                            // P3.4,5 = USCI_A0 TXD/RXD
  UCA0CTL1 |= UCSSEL_2;                   // SMCLK
  UCA0BR0 = 0x6d;
  UCA0BR1 = 0x00;
  UCA0MCTL = 0x03;
  UCA0CTL1 &= ~UCSWRST;                   // **Initialize USCI state machine**
  IE2 |= UCA0RXIE;                         // Enable USCI_A0 RX interrupt
}

3万 · 2015-10-21 08:47

你怎么移植的？

3万 · 2015-10-21 08:51

MSP430F1232和MSP430F2132，好多寄存器名称不一样，要注意

只看该作者 · 2015-10-21 09:03

dirtwillfly 发表于 2015-10-21 08:47
你怎么移植的？

MSP430F1232和MSP430F2132端口是一样的，只是寄存器名称不一样，改好后不运行了？

只看该作者 · 2015-10-21 09:06

dirtwillfly 发表于 2015-10-21 08:51
MSP430F1232和MSP430F2132，好多寄存器名称不一样，要注意

添加BCSCTL3 |= LFXT1S1; // 3 ?16MHz crystal or resonator运行了，波特率又不对了

3万 · 2015-10-21 09:28

刚翻了翻手册，这两个mcu的串口区别还是蛮大的。
f1232是USART0，f2132是USCIA0
这两个模块差别比较大，功能上USCIA0更强

只看该作者 · 2015-10-21 10:22

dirtwillfly 发表于 2015-10-21 09:28
刚翻了翻手册，这两个mcu的串口区别还是蛮大的。
f1232是USART0，f2132是USCIA0
这两个模块差别比较大，功 ...

那我这个怎么改呢？

3万 · 2015-10-21 10:26

wodedaqianjin 发表于 2015-10-21 10:22
那我这个怎么改呢？

这个模块的初始化和使用，重新写吧。
可以参考官网的例程

只看该作者 · 2015-10-21 10:37

dirtwillfly 发表于 2015-10-21 10:26
这个模块的初始化和使用，重新写吧。
可以参考官网的例程

  BCSCTL1 |= XTS;                         // ACLK = LFXT1 = HF XTAL
  BCSCTL3 |= LFXT1S1;                      // 3 ?16MHz crystal or resonator
  do
  {
IFG1 &= ~OFIFG;                      // Clear OSCFault flag
for (i = 0xFF; i > 0; i--);          // Time for flag to set
  }
  while (IFG1 & OFIFG);                   // OSCFault flag still set?
  BCSCTL2 |= SELM_3 + SELS+DIVM_2+DIVS_2;

  P3SEL = 0x30;                            // P3.4,5 = USCI_A0 TXD/RXD
  UCA0CTL0 |= UCPEN;
  UCA0CTL1 |= UCSSEL_2;                   // SMCLK
  UCA0BR0 = 104;                         // 1MHz 9600
  UCA0BR1 = 0;                            // 1MHz 9600
  UCA0MCTL = 1;                      // Modulation UCBRSx = 1
  UCA0CTL1 &= ~UCSWRST;                   // **Initialize USCI state machine**
  IE2 |= UCA0RXIE;                         // Enable USCI_A0 RX interrupt

按照例程这个用4M晶振波特率不稳定！

只看该作者 · 2015-10-21 10:38

本帖最后由 wodedaqianjin 于 2015-10-21 10:40 编辑

dirtwillfly 发表于 2015-10-21 10:26
这个模块的初始化和使用，重新写吧。
可以参考官网的例程

{
  unsigned int i;
  BCSCTL1 |= XTS;                         // ACLK = LFXT1 = HF XTAL
  BCSCTL3 |= LFXT1S1;                      // 3 ?16MHz crystal or resonator
  do
  {
IFG1 &= ~OFIFG;                      // Clear OSCFault flag
for (i = 0xFF; i > 0; i--);          // Time for flag to set
  }
  while (IFG1 & OFIFG);                   // OSCFault flag still set?
  BCSCTL2 |= SELM_3 + SELS+DIVM_2+DIVS_2;                // MCLK = SMCLK = LFXT1/4 (safe)

// Timer_A Capture/Compare Control Register
  TACCTL2 = CM_1 + CCIS_1 + CAP;          // Capture on rising Edge
                                          // Capture input is CCI2B = ACLK
                                          // Async capture
                                          // Capture mode
                                          // Output mode is OUT bit
                                          // Interrupt disabled
                                          // OUT bit is 0
                                          // Clear capture overflow bit (COV)
                                          // Clear interrupt flag (CCIFG)

  // Timer A Control Register
  TACTL = TASSEL_2 + MC_2 + TACLR;       // Clk src is SmaciLK
                                          // Input clock divider is 1
                                          // Continuous mode
                                          // Reset
                                          // Interrupt is disabled
                                          // Clear interrupt flag (TAIFG)
}

//
// Configure USART0 for UART mode
//
void configUart0(void)
{
  P3SEL = 0x30;                            // P3.4,5 = USCI_A0 TXD/RXD
  UCA0CTL0 |= UCPEN;
  UCA0CTL1 |= UCSSEL_2;                   // SMCLK
  UCA0BR0 = 104;                         // 1MHz 9600
  UCA0BR1 = 0;                            // 1MHz 9600
  UCA0MCTL = 1;                      // Modulation UCBRSx = 1
  UCA0CTL1 &= ~UCSWRST;                   // **Initialize USCI state machine**
  IE2 |= UCA0RXIE;                         // Enable USCI_A0 RX interrupt
}
波特率不稳定