Note When using this the PS2D User Module and GPIO pins from Port n (Pn.2-Pn.7), the application should use the Port_n_Data_SHADE shadow register to ensure consistent data handling. From assembly language, you can access the Port_n_Data_SHADE RAM location directly. From C language, you should include an extern reference: extern BYTE Port_n_Data_SHADE; // Where n is the port number 那么我的理解是,要用 Port_1_Data_SHADE来映射P1.3,P1.4口来作为SCLK和SDATA是吗?
p1口的输出, PS2D_1_Send_0: AND [Port_1_Data_SHADE], ~PS2D_1_SDATA ; Set the data bit low JMP PS2D_1_Clock_Out_Bit ; This jump maintains the same number ; of clock cycles for both a 1 or 0 ; Jump here to clock out the bit PS2D_1_Clock_Out_Bit: MOV A, [Port_1_Data_SHADE] ; Get the shadow MOV REG[PS2D_1_DR], A ; Clock High and data
DELAY 10, 12 ; Wait 10 uSec
; Clock Low ; Clock Low and the data XOR [Port_1_Data_SHADE], PS2D_1_SCLK ; Clock Low MOV A, [Port_1_Data_SHADE] ; Get the shadow MOV REG[PS2D_1_DR], A ; Clock Low and data
DELAY 38, 12 ; Wait 38 uSec
; Clock High ; Finally Clock High and the data XOR [Port_1_Data_SHADE], PS2D_1_SCLK ; Clock High MOV A, [Port_1_Data_SHADE] ; Get the shadow MOV REG[PS2D_1_DR], A ; Clock High and data
DELAY 22, 60 ; Wait 22 uSec
; Check for inhibit CLEARC ; Carry clear indicates success TST REG[PS2D_1_DR], PS2D_1_SCLK ; Inhibit? JNZ .clock_done ; Jump if not SETC ; Carry set indicates fail/Inhibit
.clock_done: ; Done RET
就是 XOR [Port_1_Data_SHADE], PS2D_1_SCLK ; Clock High MOV A, [Port_1_Data_SHADE] ; Get the shadow MOV REG[PS2D_1_DR], A ; Clock High and data
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