请教CY7C68013A固件代码

只看该作者 · 2009-6-22 13:46

您好，请教如下问题，望回答，谢谢！

Code Path: C:CypressUSBExamplesFX2LPBulkloopBulkloop.C

  // default: all endpoints have their VALID bit set
  // default: TYPE1 = 1 and TYPE0 = 0 --> BULK
  // default: EP2 and EP4 DIR bits are 0 (OUT direction)
  // default: EP6 and EP8 DIR bits are 1 (IN direction)
  // default: EP2, EP4, EP6, and EP8 are double buffered      (1)

  // we are just using the default values, yet this is not necessary...
  EP1OUTCFG = 0xA0;          (2)
  EP1INCFG = 0xA0;
  SYNCDELAY;                    // see TRM section 15.14
  EP2CFG = 0xA2;
  SYNCDELAY;
  EP4CFG = 0xA0;
  SYNCDELAY;
  EP6CFG = 0xE2;
  SYNCDELAY;
  EP8CFG = 0xE0;

  // out endpoints do not come up armed

  // since the defaults are double buffered we must write dummy byte counts twice    (3)
  SYNCDELAY;
  EP2BCL = 0x80;                // arm EP2OUT by writing byte count w/skip.
  SYNCDELAY;
  EP2BCL = 0x80;
  SYNCDELAY;
  EP4BCL = 0x80;                // arm EP4OUT by writing byte count w/skip.
  SYNCDELAY;
  EP4BCL = 0x80;

问题：

(1)从下面寄存器看，只有2&6是Double Buffer，为什么说4&8也是Double Buffer？

贴不上图，请看ez_usb_r___technical_reference_manual__trm__14  P262

(2)

    EP1OUTCFG = 0xA0;
    EP1INCFG = 0xA0;

    这两个寄存器之间为什么不用加 SYNCDELAY;

(3) “since the defaults are double buffered we must write dummy byte counts twice”

    请问这句话的依据是什么？在Datasheet的什么地方可以看到这句话的原型？

    另外，为什么只写EP2BCL & EP4BCL，不写EP6BCL & EP8BCL ？