最近将ＮandFlash 的驱动进行了修改并测试，三台样机，终于调试出一台可用的．驱动源代码如下：
#include "AT91SAM7S64a.h"
#include "Board.h"
#include "type.h"
#include "AD_Port.h"
//#include "dbgu.h"
#include <string.h>
/*
void KEY_ISR (void) __irq
{
INT8U i;
*AT91C_AIC_IDCR = (1 << AT91C_ID_PIOA); //禁止PIOA外围中断功能
i = *AT91C_PIOA_ISR;
*AT91C_AIC_ICCR = (1<<AT91C_ID_PIOA);
DBGU_Print("Interrupt
");
*AT91C_AIC_IECR = (1<<AT91C_ID_PIOA); //使能PIOA外围中断
*AT91C_AIC_EOICR = 0; // End of Interrupt
}
*/
//----------------------------------------------------------------------
void port_Delay(INT16U time)
{
INT16U i;
{
for(i=0; i<time; i++);
}
}
//----------------------------------------------------------------------
void port_ClkOpen(void)
{
*AT91C_PMC_SCER = AT91C_CKGR_MOSCEN; //使能系统时钟寄存器的处理器时钟
*AT91C_PMC_PCER = 1 << AT91C_ID_PIOA;
}
////////////////////////////////////////////////////////////////
void port_8BitInit(void)
{
*AT91C_PIOA_PER |= (PORT_CTRL_MASK|PORT_8BIT); //选中GPIO控制输出
*AT91C_PIOA_OER |= (PORT_CTRL_MASK | PORT_8BIT); //打开输出三态门
//*AT91C_PIOA_ODR |= (NUSB_INT | HDD_INTRQ);
*AT91C_PIOA_PPUER |= (PORT_CTRL_MASK | PORT_8BIT );
*AT91C_PIOA_OWER = PORT_8BIT;
*AT91C_PIOA_OWDR = ~PORT_8BIT;
NWRITE_HIGH(); //拉高写信号线
NREAD_HIGH(); //拉高读信号线
NLEBA_HIGH(); //总线器件片选切换到非选中状态
// NLEAB_HIGH();
// NOEBA_HIGH();
// NOEAB_HIGH();
}
//------------------------------------------------------------------------
void port_IntInit(void)
{
/*
*AT91C_AIC_IDCR = (1 << AT91C_ID_PIOA); //禁止PIOA外围中断功能
AT91C_BASE_AIC->AIC_SMR[AT91C_ID_PIOA] = (AT91C_AIC_PRIOR_HIGHEST | AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED);
//中断模式(中断级别和触发模式)
*AT91C_AIC_ICCR = (1<<AT91C_ID_PIOA); //中断清除
*AT91C_PIOA_IDR = 0xffffffff; //禁止所有PIOA中断
// AT91C_BASE_AIC->AIC_SVR[AT91C_ID_PIOA] = (unsigned long)KEY_ISR;
// *AT91C_PIOA_IER = (SW3_MASK | SW4_MASK); //允许SW3，4中断
*AT91C_AIC_IECR = (1<<AT91C_ID_PIOA); //使能PIOA外围中断
*AT91C_AIC_FFDR = 0xffffffff; //禁止FIQ
*/
}
//----------------------------------------------------------------------
/*
INT8U port_GetINT(INT8U u8Device)
{
if(CH375_INTRQ == u8Device)
{
if(*AT91C_PIOA_PDSR & NUSB_INT)
{
return 1;
}
else
{
return 0;
}
}
else if(IDE_INTRQ == u8Device)
{
if(*AT91C_PIOA_PDSR & HDD_INTRQ)
{
return 1;
}
else
{
return 0;
}
}
return 0;
}
*/
//----------------------------------------------------------------------
/*
void port_SetAddress(INT8U u8Add)
{
*AT91C_PIOA_ODSR = ((INT32U)u8Add)<<ADPort_Offset;
ADD_LATCH_HIGH();
// port_Delay(1);
ADD_LATCH_LOW();
}
//----------------------------------------------------------------------
void port_WriteData(INT8U add, INT8U data)
{
port_SetAddress(add); //0111 1110b
*AT91C_PIOA_ODSR = ((INT32U)data)<<ADPort_Offset;
NWRITE_LOW();
// port_Delay(1);
NWRITE_HIGH();
}
*/
void port_WriteDataNoAdd(INT8U data)
{
unsigned long ulWriteData;
ulWriteData = (INT32U)data;
ulWriteData <<= ADPort_Offset;
*AT91C_PIOA_ODSR = ulWriteData;
NWRITE_LOW();
// port_Delay(1);
NWRITE_HIGH();
}
//----------------------------------------------------------------------
/*
INT8U port_ReadData(INT8U add)
{
INT32U temp32;
INT8U temp8;
port_SetAddress(add); //0111 1110b
*AT91C_PIOA_ODR |= (PORT_8BIT);
NREAD_LOW();
// port_Delay(1);
temp32 = *AT91C_PIOA_PDSR;
NREAD_HIGH();
*AT91C_PIOA_OER |= (PORT_8BIT);
temp8 = (INT8U)(temp32>>ADPort_Offset);
return temp8;
}
*/
//----------------------------------------------------------------------
INT8U port_ReadDataNoAdd(void)
{
INT32U temp32;
INT8U temp8;
*AT91C_PIOA_ODR |= (PORT_8BIT);
NREAD_LOW();
// port_Delay(1);
temp32 = *AT91C_PIOA_PDSR;
NREAD_HIGH();
*AT91C_PIOA_OER |= (PORT_8BIT);
temp8 = (INT8U)(temp32>>ADPort_Offset);
return temp8;
}
void TestADPort(void)
{
port_8BitInit();
while(1)
{
Nandflash_CMD_LATCH_HIGH();
Nandflash_CMD_LATCH_LOW();
Nandflash_ADDR_LATCH_HIGH();
Nandflash_ADDR_LATCH_LOW();
NLEBA_HIGH();
NLEBA_LOW();
port_WriteDataNoAdd(0x00);
port_WriteDataNoAdd(0xff);
port_WriteDataNoAdd(0x55);
port_WriteDataNoAdd(0xaa);
}
}
#define COMMAND 0x03
#define ADDRESS 0x05
#define D_DATA 0x01
#define INACTIVE 0x09
void NandFlash_Reset(void) //flash reset
{
unsigned int i;
NLEBA_LOW();
Nandflash_CMD_LATCH_HIGH();
Nandflash_ADDR_LATCH_LOW();
port_WriteDataNoAdd(0xff);
NLEBA_HIGH();
for (i=0; i<3000; i++) ; //delay
}
void NandFlash_ReadID(uchar *IDBuff)
{
uchar ucIDBuff[4];
NLEBA_LOW();
Nandflash_CMD_LATCH_HIGH();
Nandflash_ADDR_LATCH_LOW();
port_WriteDataNoAdd(0x90);
Nandflash_CMD_LATCH_LOW();
Nandflash_ADDR_LATCH_HIGH();
port_WriteDataNoAdd(0x00);
Nandflash_CMD_LATCH_LOW();
Nandflash_ADDR_LATCH_LOW();
ucIDBuff[0] = port_ReadDataNoAdd();
ucIDBuff[1] = port_ReadDataNoAdd();
ucIDBuff[2] = port_ReadDataNoAdd();
ucIDBuff[3] = port_ReadDataNoAdd();
memcpy(IDBuff,ucIDBuff,4);
NLEBA_HIGH();
}
void TestNandFlash(void)
{
uchar ucDataBuff[4];
port_8BitInit();
NandFlash_Reset();
NandFlash_ReadID(ucDataBuff);
}
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