开发板FMC上挂载的是SDRAM,对应 的最主要的初始化函数是
与其他外设的初始化一样,初始化过程也是在对结构体sdramHandle的赋值。
这个结构体的类型是SDRAM_HandleTypeDef
这是一个比较简单的结构体
typedef struct
{
FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
__IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
HAL_LockTypeDef Lock; /*!< SDRAM locking object */
DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
}SDRAM_HandleTypeDef;
对FMC初始化的硬件相关的函数是HAL_SDRAM_Init(&sdramHandle, &Timing)
而其中再主要的 是函数HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init);
if (Init->SDBank != FMC_SDRAM_BANK2)
{
tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
/* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
tmpr1 &= ((uint32_t)~(FMC_SDCR1_NC | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
FMC_SDCR1_NB | FMC_SDCR1_CAS | FMC_SDCR1_WP | \
FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
tmpr1 |= (uint32_t)(Init->ColumnBitsNumber |\
Init->RowBitsNumber |\
Init->MemoryDataWidth |\
Init->InternalBankNumber |\
Init->CASLatency |\
Init->WriteProtection |\
Init->SDClockPeriod |\
Init->ReadBurst |\
Init->ReadPipeDelay
);
Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
}
else /* FMC_Bank2_SDRAM */
{
tmpr1 = Device->SDCR[FMC_SDRAM_BANK1];
/* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
tmpr1 &= ((uint32_t)~(FMC_SDCR1_NC | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
FMC_SDCR1_NB | FMC_SDCR1_CAS | FMC_SDCR1_WP | \
FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
tmpr1 |= (uint32_t)(Init->SDClockPeriod |\
Init->ReadBurst |\
Init->ReadPipeDelay);
tmpr2 = Device->SDCR[FMC_SDRAM_BANK2];
/* Clear NC, NR, MWID, NB, CAS, WP, SDCLK, RBURST, and RPIPE bits */
tmpr2 &= ((uint32_t)~(FMC_SDCR1_NC | FMC_SDCR1_NR | FMC_SDCR1_MWID | \
FMC_SDCR1_NB | FMC_SDCR1_CAS | FMC_SDCR1_WP | \
FMC_SDCR1_SDCLK | FMC_SDCR1_RBURST | FMC_SDCR1_RPIPE));
tmpr2 |= (uint32_t)(Init->ColumnBitsNumber |\
Init->RowBitsNumber |\
Init->MemoryDataWidth |\
Init->InternalBankNumber |\
Init->CASLatency |\
Init->WriteProtection);
Device->SDCR[FMC_SDRAM_BANK1] = tmpr1;
Device->SDCR[FMC_SDRAM_BANK2] = tmpr2;
}
要注意。BANK1对应 BANK0,BANK2对应 BANK1
#define FMC_SDRAM_BANK1 ((uint32_t)0x00000000)
#define FMC_SDRAM_BANK2 ((uint32_t)0x00000001)
其本质,不过是对寄存器SDCR的配置。
还有一个寄存器STDR。它的配置在函数FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);中。
这两个函数完成了对SRAM的基本配置。
最后对SRAM进行读写结果:
|