我的源文件
library IEEE;
use IEEE.std_logic_1164.all;
package P_alarm is
subtype t_digital is integer range 0 to 9;
subtype t_short is integer range 0 to 65535;
type t_clock_time is array(3 downto 0) of T_digital;
type t_display is array(3 downto 0) of Std_logic_vector(9 downto 0);
type seg7 is array(0 to 9) of Std_logic_vector(9 downto 0);
constant Seven_seg:seg7:=("0000000001",--0
"0000000010",--1
"0000000100",--2
"0000001000",--3
"0000010000",--4
"0000100000",--5
"0001000000",--6
"0010000000",--7
"0100000000",--8
"1000000000");--9
end package;
library IEEE;
use IEEE.std_logic_1164.all;
use WORK.P_alarm.all;
ENTITY Alarm_controller is
port(Key,Alarm_botton,Time_botton,clk,reset:in std_logic;
Load_new_a,Load_new_c,Show_new_time,Show_a:out std_logic);
end Alarm_controller;
ARCHITECTURE art of Alarm_controller is
type t_state is(s0,s1,s2,s3,s4);--lie zhuang tai
constant key_timeout:t_short:=900;--jian pan yan shi 900ns
constant show_alarm_timeout:t_short:=900;--alarm jian yan shi 900ns
signal curr_state:t_state;--zhuang tai ji dang qian zhuang tai wei
signal next_state:t_state;--zhuang tai ji xia yi gong zuo wei
signal counter_k:t_short;--jian pan dong zuo shi jian
signal enable_count_k:std_logic;--jian pan chao shi yun xu
signal count_k_end:std_logic;--jian pan chao shi jie shu
signal counter_a:t_short;--alarm jian dong zuo shi jian
signal enable_count_a:std_logic;--alarm jian chao shi yun xu
signal count_a_end:std_logic;--alarm jian chao shi jie shu
begin
p0:process(clk,reset)
begin
if reset='1'then
curr_state<=s0;
elsif rising_edge(clk)then
curr_state<=next_state;
end if;
end process;
process(key,alarm_botton,time_botton,curr_state,count_a_end,count_k_end)is
begin
next_state<=curr_state;
load_new_a<='0';
load_new_c<='0';
show_a<='0';
show_new_time<='0';
enable_count_k<='0';
enable_count_a<='0';
case curr_state is
when s0=>
if(Key='1')then
next_state<=s1;
Show_new_time<='1';
elsif(Alarm_botton<='1')then
next_state<=s4;
Show_a<='1';
else
next_state<=s0;
null;
end if;
when s1=>
if(key='1')then
next_state<=s1;
Show_new_time<='1';
elsif(Alarm_botton<='1')then
next_state<=s2;
Load_new_a<='1';
elsif(Time_botton<='1')then
next_state<=s3;
Load_new_c<='1';
else
if(count_k_end='1')then
next_state<=s0;
null;
else
next_state<=s1;
Show_new_time<='1';
end if;
enable_count_k<='1';--yun xu jian pan chao shi
end if;
when s2=>
if(Alarm_botton<='1')then
next_state<=s2;
Load_new_a<='1';
else
next_state<=s0;
null;
end if;
when s3=>
if(Time_botton<='1')then
next_state<=s3;
Load_new_c<='1';
else
next_state<=s0;
null;
end if;
when s4=>
if(Alarm_botton<='1')then
next_state<=s4;
else
if(count_a_end='1')then
next_state<=s0;
null;
else
next_state<=s4;
Show_a<='1';
end if;
enable_count_a<='1';--yun xu alarm chao shi
end if;
when others=>
null;
end case;
end process ;
Count_key:process(Enable_count_k,clk)
begin
if (Enable_count_k<='0')then
Counter_k<=0;
count_k_end<='0';
elsif (rising_edge(clk))then
if(counter_k>=key_timeout)then
count_k_end<='1';
else
counter_k<=Counter_k+1;
end if;
end if;
end process Count_key;
Count_alarm:process(Enable_count_a,clk)--alarm yan shi jin cheng
begin
if(enable_count_a<='1')then--qing 0
counter_a<=0;
count_a_end<='0';
elsif (rising_edge(clk))then
if (counter_a>=show_alarm_timeout)then--xun huan ci shu
count_a_end<='1';
else
counter_a<=counter_a+1;
end if;
end if;
end process Count_alarm;
end art;
这是一个状态机，可是s3状态我经过编译之后生成了状态图，怎么s3的状态跳不过去啊？谁帮我看看？![]() |
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