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我想通过程序实现74ls373的功能！<br />一下是我编写的程序<br />library IEEE; <br />use IEEE.std_logic_1164.all; <br /><br />entity ls74373 is <br />port ( <br /> OE ,LE: in std_logic<br /> DATA_IN : in std_logic_vector (7 downto 0); <br /> DATA_OUT : out std_logic_vector (7 downto 0) <br /> ); <br />end ls74373; <br />architecture ls373 of ls74373 is <br />begin <br />process(LE)<br />begin<br /> if (OE='0' and LE='1') then <br /> DATA_OUT<=DATA_IN; <br /> end if; <br />end process;<br />end architecture ls373;<br /><br />现在遇到的情况是，编译无法通过！<br />请问是不是我的编程想法上有错误？<br />我该如何编程实现74ls373呢？<br /><br />请指教！谢谢！ |
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