/**************************************************************************//**
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V2.00
* $Revision: 3 $
* $Date: 15/04/10 10:26a $
* [url=home.php?mod=space&uid=247401]@brief[/url] NUC230_240 Series GPIO Driver Sample Code
*
* @note
* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
******************************************************************************/
#include <stdio.h>
#include "NUC230_240.h"
#define PLL_CLOCK 72000000
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable Internal RC 22.1184MHz clock */
CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
/* Waiting for Internal RC clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
/* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));
/* Enable external XTAL 12MHz clock */
CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);
/* Waiting for external XTAL clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set GPB multi-function pins for UART0 RXD and TXD */
SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB0_Msk | SYS_GPB_MFP_PB1_Msk);
SYS->GPB_MFP |= (SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD);
}
#define MaxValue 0xFFFF
unsigned int cap_buffer[256];
unsigned int cap_edge[256];
unsigned int cap_count;
double length,time;
void PWMB_IRQHandler(void)
{
//1 Rising edge latch interrupt
if(PWM_GetCaptureIntFlag(PWMB, 3)==1)
{
PWM_ClearCaptureIntFlag(PWMB, 3, PWM_CAPTURE_INT_RISING_LATCH);
}
//2 Falling edge latch interrupt
if(PWM_GetCaptureIntFlag(PWMB, 3)==2)
{
PWM_ClearCaptureIntFlag(PWMB, 3, PWM_CAPTURE_INT_FALLING_LATCH);
time=MaxValue - PWM_GET_CAPTURE_FALLING_DATA(PWMB, 3);
/*
if(cap_count<256)
{
PWM_ClearCaptureIntFlag(PWMB, 3, PWM_CAPTURE_INT_FALLING_LATCH);
cap_buffer[cap_count]=MaxValue - PWM_GET_CAPTURE_FALLING_DATA(PWMB, 3);
cap_count++;
}
*/
}
if(PWM_GetCaptureIntFlag(PWMB, 3)==3)
{
while(1);
}
}
/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function */
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
#if 0
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %d Hz\n", SystemCoreClock);
printf("+-------------------------------------------------+\n");
printf("| PB.2(Output) and PE.1(Input) Sample Code |\n");
printf("+-------------------------------------------------+\n\n");
printf(" >> Please connect PB.2 and PE.1 first << \n");
printf(" Press any key to start test by using [Pin Data Input/Output Control] \n\n");
getchar();
/* Configure PB.2 as Output mode and PE.1 as Input mode */
GPIO_SetMode(PB, BIT2, GPIO_PMD_OUTPUT);
GPIO_SetMode(PE, BIT1, GPIO_PMD_INPUT);
i32Err = 0;
printf("GPIO PB.2(output mode) connect to PE.1(input mode) ......");
/* Use Pin Data Input/Output Control to pull specified I/O or get I/O pin status */
/* Pull PB.2 to Low and check PE.1 status */
PB2 = 0;
if(PE1 != 0) {
i32Err = 1;
}
/* Pull PB.2 to High and check PE.1 status */
PB2 = 1;
if(PE1 != 1) {
i32Err = 1;
}
if(i32Err) {
printf(" [FAIL].\n");
} else {
printf(" [OK].\n");
}
/* Configure PB.2 and PE.1 to default Quasi-bidirectional mode */
GPIO_SetMode(PB, BIT2, GPIO_PMD_QUASI);
GPIO_SetMode(PE, BIT1, GPIO_PMD_QUASI);
#endif
GPIO_SetMode(PA, BIT0, GPIO_PMD_OUTPUT);
SystemCoreClockUpdate();
PA0=0;
CLK_SysTickDelay(500);
//Initial PWM7 Function Pin
SYS->GPE_MFP = (SYS->GPE_MFP & ~SYS_GPE_MFP_PE1_Msk) | SYS_GPE_MFP_PE1_PWM7;
/* Enable PWM module clock */
CLK_EnableModuleClock(PWM67_MODULE);
/* Select PWM module clock source */
CLK_SetModuleClock(PWM67_MODULE, CLK_CLKSEL2_PWM67_S_HXT, 0);
/* Reset PWMA channel4~channel7 */
SYS_ResetModule(PWM47_RST);
/* Enable Backward Compatible: write 1 to clear CFLRI0~3 and CRLRI0~3 */
PWMB->PBCR = 1;
PWMB->PCR |= PWM_PCR_CH3MOD_Msk;
PWM_SET_DIVIDER(PWMB, 3, PWM_CLK_DIV_4); //Set PWM1_CH3 Clock Source Divider
PWM_SET_PRESCALER(PWMB, 3, 2); //Set PWM1_CH2 and PWM1_CH3 Prescaler
PWMB->CNR3 = MaxValue;
//Start Capture
PWM_EnableCapture(PWMB, 0x8);
PWM_EnableCaptureInt(PWMB, 3, PWM_CAPTURE_INT_FALLING_LATCH|PWM_CAPTURE_INT_RISING_LATCH);
NVIC_EnableIRQ(PWMB_IRQn);
PWM_Start(PWMB, 0x8);
while(1){
PA0=1;
CLK_SysTickDelay(10);
PA0=0;
CLK_SysTickDelay(600000);
length=time*34.0/2000.0;
printf("length=%f\n\r",length);
}
}
/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
| 
楼主
标题置顶
标题高亮
