GD32F130 ADC死在了校验函数

只看该作者 · 2017-4-25 09:49

本帖最后由 cug_niubosong 于 2017-4-25 09:54 编辑

{
GPIO_InitPara GPIO_InitStructure;
ADC_InitPara ADC_InitStructure;

RCC_AHBPeriphClock_Enable(RCC_AHBPERIPH_GPIOB, ENABLE);

GPIO_InitStructure.GPIO_Pin = GPIO_PIN_0;
GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AN;
GPIO_InitStructure.GPIO_OType = GPIO_OTYPE_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PUPD_NOPULL;
GPIO_InitStructure.GPIO_Speed = GPIO_SPEED_50MHZ;
GPIO_Init(GPIOB, &GPIO_InitStructure);

RCC_APB2PeriphClock_Enable( RCC_APB2PERIPH_ADC1, ENABLE);

ADC_InitStructure.ADC_Mode_Scan = DISABLE;
ADC_InitStructure.ADC_Mode_Continuous = DISABLE;
ADC_InitStructure.ADC_Trig_External = ADC_EXTERNAL_TRIGGER_MODE_NONE;
ADC_InitStructure.ADC_Data_Align = ADC_DATAALIGN_RIGHT;
ADC_InitStructure.ADC_Channel_Number = 1;
ADC_Init(&ADC_InitStructure);

ADC_RegularChannel_Config(ADC_CHANNEL_8,1,ADC_SAMPLETIME_55POINT5);

ADC_Enable(ENABLE);

ADC_Calibration();
}

void ADC_Calibration(void)
{
/* Reset the selected ADC1 calibration registers */
ADC1->CTLR2 |= CTLR2_RSTCLB_SET;
/*Check the RSTCLB bit state */
while(ADC1->CTLR2 & CTLR2_RSTCLB_SET);
/* Enable ADC1 calibration process */
ADC1->CTLR2 |= CTLR2_CLB_SET;
/* Check the CLB bit state */
while((ADC1->CTLR2 & CTLR2_CLB_SET) != (u16)RESET);
}

只看该作者 · 2017-4-25 09:51

也就是置位 CTLR2 寄存器的 RSECLB位，即初始化ADC校验后，一直没有初始化成功，不知道为什么。

只看该作者 · 2017-4-25 09:53

再有就是把ADC校验初始化的的那两句删除
ADC1->CTLR2 |= CTLR2_RSTCLB_SET;
while(ADC1->CTLR2 & CTLR2_RSTCLB_SET);
直接开始ADC校验
也会一直死在while((ADC1->CTLR2 & CTLR2_CLB_SET) != (u16)RESET);
也就是校验一直过不去

只看该作者 · 2017-4-25 11:21

加了句ADC时钟函数
RCC_APB2PeriphClock_Enable( RCC_APB2PERIPH_ADC1, ENABLE);
RCC_ADCCLKConfig(RCC_ADCCLK_APB2_DIV2);
说明
/**
  * @brief  Configure the ADC clock (ADCCLK).
  * @param  RCC_ADCCLK: specify the ADC clock source. This clock is derived
  *       from the HSI14 or APB2 clock.
  * This parameter can be one of the following values:
  *    @arg RCC_ADCCLK_HSI14: ADC clock = HSI14 (14MHz)
  *    @arg RCC_ADCCLK_APB2_DIV2: ADC clock = APB2/2
  *    @arg RCC_ADCCLK_APB2_DIV4: ADC clock = APB2/4
  *    @arg RCC_ADCCLK_APB2_DIV6: ADC clock = APB2/6
  *    @arg RCC_ADCCLK_APB2_DIV8: ADC clock = APB2/8
  * @retval None
  */
void RCC_ADCCLKConfig(uint32_t RCC_ADCCLK)
{
/* Clear ADCPS bit */
RCC->GCFGR &= ~RCC_GCFGR_ADCPS;
/* Set ADCPS bits according to RCC_APB2 value */
RCC->GCFGR |= RCC_ADCCLK & 0xFFFF;
/* Clear ADCSEL bit */
RCC->GCFGR3 &= ~RCC_GCFGR3_ADCSEL;
/* Set ADCSEL bits according to RCC_ADCCLK value */
RCC->GCFGR3 |= RCC_ADCCLK >> GCFGR3_HSI14ADC_OFFSET;
}