[技术问答] NUC505的SPIM能当作普通SPI使用吗?

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 楼主| subo19920716 发表于 2017-5-12 22:56 | 显示全部楼层 |阅读模式
NUC, spi, DMA, DM, AC
准备使用NUC505DL13Y做一项目,其他功能都做得差不多了,还有SPI部分没有调试,之前看了手册上说SPI支持DMA传输,就没太在意。现在回过头来仔细一看,才发现这是一个坑。
1.png
NUC505根本就没有PDMA,剩下一个SPIM支持DMA,貌似是SPI Flash专用SPI接口,不知能否当作普通SPI使用?

xyz549040622 发表于 2017-5-13 07:00 | 显示全部楼层
试试不就知道了么,一般情况下,通常都是兼容的。
zhuotuzi 发表于 2017-5-13 22:02 | 显示全部楼层
应该可以的。
zhuotuzi 发表于 2017-5-13 22:03 | 显示全部楼层
实在不行就用3根GPIO来做,IO模拟的SPI更简单。。
zhuotuzi 发表于 2017-5-13 23:37 | 显示全部楼层
我经常是用硬件的搞不定了,就直接IO模拟
天灵灵地灵灵 发表于 2017-5-16 15:04 | 显示全部楼层
官方没有提供这个的例程吗,如果不行,就来模拟的。
天灵灵地灵灵 发表于 2017-5-16 15:08 | 显示全部楼层
  1. /**************************************************************************//**
  2. * [url=home.php?mod=space&uid=288409]@file[/url]     main.c
  3. * [url=home.php?mod=space&uid=895143]@version[/url]  V2.0
  4. * $Revision: 4 $
  5. * $Date: 15/03/04 9:49a $
  6. * [url=home.php?mod=space&uid=247401]@brief[/url]    Demonstrate how to communicate with an off-chip SPI slave device. This sample code needs to work with SPI_SlaveMode.
  7. *
  8. * @note
  9. * Copyright (C) 2015 Nuvoton Technology Corp. All rights reserved.
  10. *
  11. ******************************************************************************/
  12. #include <stdio.h>
  13. #include "NUC505Series.h"


  14. #define TEST_COUNT 16

  15. uint32_t g_au32SourceData[TEST_COUNT];
  16. uint32_t g_au32DestinationData[TEST_COUNT];
  17. volatile uint32_t g_u32TxDataCount;
  18. volatile uint32_t g_u32RxDataCount;

  19. /* Function prototype declaration */
  20. void SYS_Init(void);
  21. void UART0_Init(void);
  22. void SPI1_Init(void);

  23. /* ------------- */
  24. /* Main function */
  25. /* ------------- */
  26. int main(void)
  27. {
  28.     uint32_t u32DataCount;

  29.     /* Init System, IP clock and multi-function I/O. */
  30.     SYS_Init();
  31.    
  32.                 /* Init UART0 to 115200-8n1 for print message */
  33.     UART0_Init();
  34.                
  35.                 /* Init SPI1, IP clock and multi-function I/O */
  36.                 SPI1_Init();

  37.     printf("\n\n");
  38.     printf("+--------------------------------------------------------+\n");
  39.     printf("|             SPI Master Mode Sample Code                |\n");
  40.     printf("+--------------------------------------------------------+\n");
  41.     printf("\n");
  42.     printf("Configure SPI1 as a master.\n");
  43.     printf("Bit length of a transaction: 32\n");
  44.     printf("The I/O connection for SPI1:\n");
  45.     printf("    SPI1_SS (PB.10)\n    SPI1_CLK (PB.11)\n");
  46.     printf("    SPI1_MOSI (PB.12)\n    SPI1_MISO (PB.13)\n\n");
  47.     printf("SPI controller will transfer %d data to a off-chip slave device.\n", TEST_COUNT);
  48.     printf("In the meanwhile the SPI controller will receive %d data from the off-chip slave device.\n", TEST_COUNT);
  49.     printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);
  50.     printf("The SPI master configuration is ready.\n");

  51.     for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
  52.     {
  53.         /* Write the initial value to source buffer */
  54.         g_au32SourceData[u32DataCount] = 0x00550000 + u32DataCount;
  55.         /* Clear destination buffer */
  56.         g_au32DestinationData[u32DataCount] = 0;
  57.     }

  58.                 SPI_ENABLE(SPI1);
  59.     printf("Before starting the data transfer, make sure the slave device is ready. Press any key to start the transfer.");
  60.     getchar();
  61.     printf("\n");

  62.     /* Set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
  63.     SPI_SetFIFO(SPI1, 4, 4);
  64.     SPI_EnableInt(SPI1, SPI_FIFO_TXTH_INT_MASK | SPI_FIFO_RXTO_INT_MASK);
  65.     g_u32TxDataCount = 0;
  66.     g_u32RxDataCount = 0;
  67.     NVIC_EnableIRQ(SPI1_IRQn);

  68.     /* Wait for transfer done */
  69.     while(g_u32RxDataCount < TEST_COUNT);

  70.     /* Print the received data */
  71.     printf("Received data:\n");
  72.     for(u32DataCount = 0; u32DataCount < TEST_COUNT; u32DataCount++)
  73.     {
  74.         printf("%d:\t0x%X\n", u32DataCount, g_au32DestinationData[u32DataCount]);
  75.     }
  76.     /* Disable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
  77.     SPI_DisableInt(SPI1, SPI_FIFO_TXTH_INT_MASK | SPI_FIFO_RXTO_INT_MASK);
  78.     NVIC_DisableIRQ(SPI1_IRQn);
  79.     printf("The data transfer was done.\n");

  80.     printf("\n\nExit SPI driver sample code.\n");

  81.     /* Disable SPI1 peripheral clock */
  82.     SPI_Close(SPI1);
  83.     while(1);
  84. }

  85. void SPI1_IRQHandler(void)
  86. {
  87.     uint32_t u32Tmp;
  88.    
  89.     /* Check RX EMPTY flag */
  90.     while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1) == 0)
  91.     {
  92.         u32Tmp = g_u32RxDataCount;
  93.         /* Read RX FIFO */
  94.         g_au32DestinationData[u32Tmp++] = SPI_READ_RX(SPI1);
  95.         g_u32RxDataCount = u32Tmp;
  96.     }
  97.     /* Check TX FULL flag and TX data count */
  98.     while((SPI_GET_TX_FIFO_FULL_FLAG(SPI1) == 0) && (g_u32TxDataCount < TEST_COUNT))
  99.     {
  100.         /* Write to TX FIFO */
  101.         SPI_WRITE_TX(SPI1, g_au32SourceData[g_u32TxDataCount++]);
  102.     }
  103.     if(g_u32TxDataCount >= TEST_COUNT)
  104.         SPI_DisableInt(SPI1, SPI_FIFO_TXTH_INT_MASK); /* Disable TX FIFO threshold interrupt */

  105.     /* Check the RX FIFO time-out interrupt flag */
  106.     if(SPI_GetIntFlag(SPI1, SPI_FIFO_RXTO_INT_MASK))
  107.     {
  108.         /* If RX FIFO is not empty, read RX FIFO. */
  109.         while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1) == 0)
  110.         {
  111.             u32Tmp = g_u32RxDataCount;
  112.             g_au32DestinationData[u32Tmp++] = SPI_READ_RX(SPI1);
  113.             g_u32RxDataCount = u32Tmp;
  114.         }
  115.     }
  116. }

  117. void SYS_Init(void)
  118. {

  119. /*---------------------------------------------------------------------------------------------------------*/
  120. /* Init System Clock                                                                                       */
  121. /*---------------------------------------------------------------------------------------------------------*/
  122.     /* Unlock protected registers */
  123.     //SYS_UnlockReg();
  124.      
  125.     /* Enable  XTAL */
  126.     CLK->PWRCTL |= CLK_PWRCTL_HXTEN_Msk;

  127.     CLK_SetCoreClock(FREQ_96MHZ);
  128.    
  129.                 /* PCLK divider */
  130.                 CLK_SetModuleClock(PCLK_MODULE, NULL, 1);
  131.                
  132.     /* Lock protected registers */
  133.     //SYS_LockReg();
  134.         
  135. }

  136. void UART0_Init(void)
  137. {
  138.                 /* Enable UART0 Module clock */
  139.     CLK_EnableModuleClock(UART0_MODULE);
  140.                 /* UART0 module clock from EXT */
  141.                 CLK_SetModuleClock(UART0_MODULE, CLK_UART0_SRC_EXT, 0);
  142.     /* Reset IP */
  143.     SYS_ResetModule(UART0_RST);   
  144.     /* Configure UART0 and set UART0 Baud-rate */
  145.                 UART_Open(UART0, 115200);
  146.                 /*---------------------------------------------------------------------------------------------------------*/
  147.     /* Init I/O Multi-function                                                                                 */
  148.     /*---------------------------------------------------------------------------------------------------------*/
  149.     /* Configure multi-function pins for UART0 RXD and TXD */
  150.                 SYS->GPB_MFPL  = (SYS->GPB_MFPL & (~SYS_GPB_MFPL_PB0MFP_Msk) ) | SYS_GPB_MFPL_PB0MFP_UART0_TXD;       
  151.                 SYS->GPB_MFPL  = (SYS->GPB_MFPL & (~SYS_GPB_MFPL_PB1MFP_Msk) ) | SYS_GPB_MFPL_PB1MFP_UART0_RXD;       
  152.        
  153. }

  154. void SPI1_Init(void)
  155. {
  156.                 /* Enable SPI1 Module clock */
  157.     CLK_EnableModuleClock(SPI1_MODULE);
  158.                 /* SPI1 module clock from EXT */
  159.                 CLK_SetModuleClock(SPI1_MODULE, CLK_SPI1_SRC_PLL, 0);
  160.     /* Reset IP */
  161.     SYS_ResetModule(SPI1_RST);   
  162.     /*---------------------------------------------------------------------------------------------------------*/
  163.     /* Init I/O Multi-function                                                                                 */
  164.     /*---------------------------------------------------------------------------------------------------------*/
  165.     /* Configure multi-function pins for SPI1 */
  166.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB10MFP_Msk) ) | SYS_GPB_MFPH_PB10MFP_SPI1_SS;       
  167.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB11MFP_Msk) ) | SYS_GPB_MFPH_PB11MFP_SPI1_CLK;       
  168.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB12MFP_Msk) ) | SYS_GPB_MFPH_PB12MFP_SPI1_MOSI;       
  169.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB13MFP_Msk) ) | SYS_GPB_MFPH_PB13MFP_SPI1_MISO;       

  170.                 /*---------------------------------------------------------------------------------------------------------*/
  171.     /* Init SPI                                                                                                */
  172.     /*---------------------------------------------------------------------------------------------------------*/
  173.     /* Configure SPI1 as a master, SPI clock rate 200 KHz,
  174.        clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */
  175.     SPI_Open(SPI1, SPI_MASTER, SPI_MODE_0, 32, 200000);
  176.     /* Enable the automatic hardware slave selection function. Select the SPI1_SS pin and configure as low-active. */
  177.     SPI_EnableAutoSS(SPI1, SPI_SS, SPI_SS_ACTIVE_LOW);
  178. }

  179. /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
天灵灵地灵灵 发表于 2017-5-16 15:09 | 显示全部楼层
  1. /**************************************************************************//**
  2. * @file     main.c
  3. * @version  V2.0
  4. * $Revision: 4 $
  5. * $Date: 15/03/04 9:49a $
  6. * @brief    Demonstrate how to communicate with an off-chip SPI master device. This sample code needs to work with SPI_MasterMode.
  7. *
  8. * @note
  9. * Copyright (C) 2015 Nuvoton Technology Corp. All rights reserved.
  10. *
  11. ******************************************************************************/
  12. #include <stdio.h>
  13. #include "NUC505Series.h"


  14. #define TEST_COUNT 16

  15. uint32_t g_au32SourceData[TEST_COUNT];
  16. uint32_t g_au32DestinationData[TEST_COUNT];
  17. volatile uint32_t g_u32TxDataCount;
  18. volatile uint32_t g_u32RxDataCount;

  19. /* Function prototype declaration */
  20. void SYS_Init(void);
  21. void UART0_Init(void);
  22. void SPI1_Init(void);

  23. /* ------------- */
  24. /* Main function */
  25. /* ------------- */
  26. int main(void)
  27. {
  28.     volatile uint32_t u32TxDataCount, u32RxDataCount;
  29.     uint32_t u32Tmp;

  30.     /* Init System, IP clock and multi-function I/O. */
  31.     SYS_Init();
  32.    
  33.                 /* Init UART0 to 115200-8n1 for print message */
  34.     UART0_Init();
  35.                
  36.                 /* Init SPI1, IP clock and multi-function I/O */
  37.                 SPI1_Init();

  38.     printf("\n\n");
  39.     printf("+-----------------------------------------------------+\n");
  40.     printf("|           SPI Slave Mode Sample Code                |\n");
  41.     printf("+-----------------------------------------------------+\n");
  42.     printf("\n");
  43.     printf("Configure SPI1 as a slave.\n");
  44.     printf("Bit length of a transaction: 32\n");
  45.     printf("The I/O connection for SPI1:\n");
  46.     printf("    SPI1_SS (PB.10)\n    SPI1_CLK (PB.11)\n");
  47.     printf("    SPI1_MOSI (PB.12)\n    SPI1_MISO (PB.13)\n\n");
  48.     printf("SPI controller will transfer %d data to a off-chip master device.\n", TEST_COUNT);
  49.     printf("In the meanwhile the SPI controller will receive %d data from the off-chip master device.\n", TEST_COUNT);
  50.     printf("After the transfer is done, the %d received data will be printed out.\n", TEST_COUNT);

  51.     for(u32TxDataCount = 0; u32TxDataCount < TEST_COUNT; u32TxDataCount++)
  52.     {
  53.         /* Write the initial value to source buffer */
  54.         u32Tmp = u32TxDataCount;
  55.         g_au32SourceData[u32TxDataCount] = 0x00AA0000 + u32Tmp;
  56.         /* Clear destination buffer */
  57.         g_au32DestinationData[u32TxDataCount] = 0;
  58.     }

  59.     u32TxDataCount = 0;
  60.     u32RxDataCount = 0;
  61.                 SPI_ENABLE(SPI1);
  62.     printf("Press any key if the master device configuration is ready.");
  63.     getchar();
  64.     printf("\n");

  65.     /* Access TX and RX FIFO */
  66.     while(u32RxDataCount < TEST_COUNT)
  67.     {
  68.         /* Check TX FULL flag and TX data count */
  69.         if((SPI_GET_TX_FIFO_FULL_FLAG(SPI1) == 0) && (u32TxDataCount < TEST_COUNT))
  70.             SPI_WRITE_TX(SPI1, g_au32SourceData[u32TxDataCount++]); /* Write to TX FIFO */
  71.         /* Check RX EMPTY flag */
  72.         if(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1) == 0)
  73.         {
  74.             u32Tmp = u32RxDataCount;
  75.             g_au32DestinationData[u32Tmp++] = SPI_READ_RX(SPI1); /* Read RX FIFO */
  76.             u32RxDataCount = u32Tmp;
  77.         }
  78.     }

  79.     /* Print the received data */
  80.     printf("Received data:\n");
  81.     for(u32RxDataCount = 0; u32RxDataCount < TEST_COUNT; u32RxDataCount++)
  82.     {
  83.         u32Tmp = u32RxDataCount;
  84.         printf("%d:\t0x%X\n", u32RxDataCount, g_au32DestinationData[u32Tmp]);
  85.     }
  86.     printf("The data transfer was done.\n");

  87.     printf("\n\nExit SPI driver sample code.\n");

  88.     /* Disable SPI1 peripheral clock */
  89.     SPI_Close(SPI1);
  90.     while(1);
  91. }

  92. void SYS_Init(void)
  93. {

  94. /*---------------------------------------------------------------------------------------------------------*/
  95. /* Init System Clock                                                                                       */
  96. /*---------------------------------------------------------------------------------------------------------*/
  97.     /* Unlock protected registers */
  98.     //SYS_UnlockReg();
  99.      
  100.     /* Enable  XTAL */
  101.     CLK->PWRCTL |= CLK_PWRCTL_HXTEN_Msk;

  102.     CLK_SetCoreClock(FREQ_96MHZ);
  103.    
  104.                 /* PCLK divider */
  105.                 CLK_SetModuleClock(PCLK_MODULE, NULL, 1);
  106.                
  107.     /* Lock protected registers */
  108.     //SYS_LockReg();
  109.         
  110. }

  111. void UART0_Init(void)
  112. {
  113.                 /* Enable UART0 Module clock */
  114.     CLK_EnableModuleClock(UART0_MODULE);
  115.                 /* UART0 module clock from EXT */
  116.                 CLK_SetModuleClock(UART0_MODULE, CLK_UART0_SRC_EXT, 0);
  117.     /* Reset IP */
  118.     SYS_ResetModule(UART0_RST);   
  119.     /* Configure UART0 and set UART0 Baud-rate */
  120.                 UART_Open(UART0, 115200);
  121.                 /*---------------------------------------------------------------------------------------------------------*/
  122.     /* Init I/O Multi-function                                                                                 */
  123.     /*---------------------------------------------------------------------------------------------------------*/
  124.     /* Configure multi-function pins for UART0 RXD and TXD */
  125.                 SYS->GPB_MFPL  = (SYS->GPB_MFPL & (~SYS_GPB_MFPL_PB0MFP_Msk) ) | SYS_GPB_MFPL_PB0MFP_UART0_TXD;       
  126.                 SYS->GPB_MFPL  = (SYS->GPB_MFPL & (~SYS_GPB_MFPL_PB1MFP_Msk) ) | SYS_GPB_MFPL_PB1MFP_UART0_RXD;       
  127.        
  128. }

  129. void SPI1_Init(void)
  130. {
  131.                 /* Enable SPI1 Module clock */
  132.     CLK_EnableModuleClock(SPI1_MODULE);
  133.                 /* SPI1 module clock from EXT */
  134.                 CLK_SetModuleClock(SPI1_MODULE, CLK_SPI1_SRC_PLL, 0);
  135.     /* Reset IP */
  136.     SYS_ResetModule(SPI1_RST);   
  137.     /*---------------------------------------------------------------------------------------------------------*/
  138.     /* Init I/O Multi-function                                                                                 */
  139.     /*---------------------------------------------------------------------------------------------------------*/
  140.     /* Configure multi-function pins for SPI1 */
  141.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB10MFP_Msk) ) | SYS_GPB_MFPH_PB10MFP_SPI1_SS;       
  142.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB11MFP_Msk) ) | SYS_GPB_MFPH_PB11MFP_SPI1_CLK;       
  143.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB12MFP_Msk) ) | SYS_GPB_MFPH_PB12MFP_SPI1_MOSI;       
  144.                 SYS->GPB_MFPH  = (SYS->GPB_MFPH & (~SYS_GPB_MFPH_PB13MFP_Msk) ) | SYS_GPB_MFPH_PB13MFP_SPI1_MISO;       

  145.                 /*---------------------------------------------------------------------------------------------------------*/
  146.     /* Init SPI                                                                                                */
  147.     /*---------------------------------------------------------------------------------------------------------*/
  148.     /* Configure SPI1 as a slave, clock idle low, 32-bit transaction, drive output on falling clock edge and latch input on rising edge. */
  149.     /* Configure SPI1 as a low level active device. SPI peripheral clock rate = f_PCLK0 */
  150.     SPI_Open(SPI1, SPI_SLAVE, SPI_MODE_0, 32, NULL);
  151. }

  152. /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/

xixi2017 发表于 2017-5-16 22:03 | 显示全部楼层
看了官方的手册和例程,完全可以当普通的用。
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