我写的一段程序，在对端口进行引脚分配时，找不到ctl这个输入端口，这是问什么啊？下面是我写的程序
module fenpin_clks(clk,rest,ctl,clk_s);
input clk,rest,ctl;
output clk_s;
reg clk_s;
reg[25:0] count;
parameter N_H = 48,N_L =48;
always @ (posedge clk)
if(! rest)
begin
count <= 1'b0;
clk_s <= 1'b0;
end
else if (ctl)
begin
if ( count < N_H/2-1)
begin
count <= count + 1'b1;
end
else
begin
count <= 1'b0;
clk_s <= ~clk_s;
end
end
else
begin
if ( count < N_L/2-1)
begin
count <= count + 1'b1;
end
else
begin
count <= 1'b0;
clk_s <= ~clk_s;
end
end
endmodule
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