ADF4351芯片与50M晶振

只看该作者 · 2017-7-12 11:14

此芯片与50M晶振需要什么驱动，我做了程序不运行，不知道为什么，是不是芯片或者程序和晶振不兼容，下面是一段代码，请大神看看哪里写的不对。
void ADF4351_1785M_Init(void)  //50M晶振测试程序
{
u8 buf[4] = {0,0,0,0};

ADF_Output_GPIOInit();
//reg5
buf[3] = 0x00; //此处配置固定输出1785M
buf[2] = 0x58;
buf[1] = 0x00; //write communication register 0x00580005 to control the progress
buf[0] = 0x05; //to write Register 5 to set digital lock detector
WriteToADF4351(4,buf);
//reg4
buf[3] = 0x00;
buf[2] = 0x9c; //(DB23=1)The signal is taken from the VCO directly;(DB22-20:4H)the RF divider is 16;(DB19-12:50H)R is 80
buf[1] = 0x80; //(DB11=0)VCO powerd up;
buf[0] = 0x3C; //(DB5=1)RF output is enabled;(DB4-3=3H)Output power level is +5dbm
/f[0] = 0x24;          //RF output is enabled; Output power level is -4dbm
WriteToADF4351(4,buf);
//reg3
buf[3] = 0x00;
buf[2] = 0x00;
buf[1] = 0x04; //(DB14-3:96H)clock divider value is 150.
buf[0] = 0xB3;
WriteToADF4351(4,buf);
//reg2
buf[3] = 0x14;
buf[2] = 0x00; //(DB6=1)set PD polarity is positive;(DB7=1)LDP is 6nS;
buf[1] = 0x8E; //(DB8=0)enable fractional-N digital lock detect;
buf[0] = 0x42; //(DB12-9:7H)set Icp 2.50 mA;
WriteToADF4351(4,buf); //(DB23-14:1H)R counter is 1
//reg1
buf[3] = 0x00;
buf[2] = 0x00;
buf[1] = 0x83;    //(DB14-3:6H)MOD counter is 6;
buf[0] = 0xe9;    //(DB26-15:6H)PHASE word is 1,neither the phase resync
WriteToADF4351(4,buf);    /r the spurious optimization functions are being used
   //(DB27=1)prescaler value is 8/9
//reg0
buf[3] = 0x00;
buf[2] = 0x47;
buf[1] = 0x03;
buf[0] = 0x60; //(DB14-3:0H)FRAC value is 0;
WriteToADF4351(4,buf); //(DB30-15:140H)INT value is 320;

}