这是Cortex-M3 Technical Reference中的一段：
Vector table entries are ARM/Thumb interworking compatible.
This causes bit [0] of the vector value to load into the EPSR T-bit on exception entry. Creating a table entry with bit [0] clear generates an INVSTATE fault on the first instruction of the handler corresponding to this vector.
应该怎么理解呢？向量表项的Bit[0]不能为0？否则会引发INVSTATE错误？
如果Bit[0]不是零，怎么实现半字或整字对齐呢 |
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