谢谢sibaidong！你的问题我没听懂。
我的顶层模块是这样的——
module sample32mega(CLKIN_IN,
rst,
CLKFX_OUT,
CLKIN_IBUFG_OUT,
CLK0_OUT,
LOCKED_OUT);
input CLKIN_IN;
output rst;
output CLKFX_OUT;
output CLKIN_IBUFG_OUT;
output CLK0_OUT;
output LOCKED_OUT;
reg rst = 1'b1;
reg cnt = 3'd0;
always@(posedge CLKIN_IN)
if(cnt != 3'd5) cnt <= cnt + 3'd1;
else begin cnt <= 3'd0;
rst <= 1'b0; end
my_dcm dcm1(
.CLKIN_IN(CLKIN_IN),
.RST_IN(rst),
.CLKFX_OUT(CLKFX_OUT),
.CLKIN_IBUFG_OUT(),
.CLK0_OUT(),
.LOCKED_OUT(LOCKED_OUT)
);
endmodule
综合时没有错误，但有3个警告。如下——
WARNING:Xst:1306 - Output <CLKIN_IBUFG_OUT> is never assigned.
WARNING:Xst:1306 - Output <CLK0_OUT> is never assigned.
WARNING:Xst:1305 - Output <rst> is never assigned. Tied to value 1.
主频50MHz。
谢谢你的热情！谢谢！
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