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[ת]SystemC modeling team aims for open-core SoCs

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nan678|  楼主 | 2010-8-30 11:24 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
[转]SystemC modeling team aims for open-core SoCs


Michael Santarini Mike Santarini
(10/21/2002 11:05 H EDT)

EDA tool vendor Synopsys Inc. and Open Core Protocol International Partnership (OCP-IP), an association providing a common, open-source standard for intellectual-property core interfaces, are in the process of developing a SystemC modeling methodology for OCP-based system-on-chip (SoC) devices.

Synopsys and OCP-IP said that the two organizations, along with Nokia and Texas Instruments Inc., are publishing an application programming interface (API) specification and example models to enable OCP users to use best-in-class SystemC design and verification methodologies.

According to the organizations, this will allow designers of complex SoCs to create SystemC models for OCP-compliant components, helping them to achieve a seamless design flow from high-level system specification to OCP-based SoC implementation.

A white paper is available from the OCP-IP Web site at www.OCPIP.org.

The API specification and SystemC example models will be available for download from the contributions area on the OSCI Web site in the fourth quarter, the organizations said.

MPU core vendor ARM has added Automotive Integrated Electronics Corp. (AIEC), eSilicon Corp., Intrinsix Corp. and ReShape Inc. to its ARM technology access program, which certifies that design houses are competent to design ARM core-based products.

According to ARM, with the addition of the four new U.S. partners, ATAP now comprises 34 member companies.

ARM said that in order to become an ATAP member company, ARM puts prospective ATAP members through a strict qualification process that includes a design flow audit, training on implementing designs with ARM cores, tools, Advanced Microcontroller Bus Architecture interface peripherals and development techniques. See www.arm.com for more information.

Configurable-core vendor Tensilica Inc. announced that Cypress Semiconductor Corp. plans to use Tensilica's Xtensa processor as the base product development platform for several future USB and wireless products.

"After an extensive competitive evaluation, we decided to partner with Tensilica because of its robust development tool chain and ability to scale the Xtensa processor depending on the application," said Cathal Phelan, vice president of the Personal Communications Division at Cypress.

The Xtensa configurable and extensible microprocessor architecture boasts an integrated hardware and software development environment with thousands of configuration options and numerous customer-specific extensions.

Designers can use the Xtensa graphical interface to create customized MPU solutions with specialized instructions. Because those instructions are recognized as "native" by a complete set of software development tools, developers can simultaneously tune both application software and processor hardware to meet specific speed, power and feature goals. Visit www.tensilica.com for more information.



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