1.Digital I/O Introduction
MSP430 devices have up to 6 digital I/O ports implemented, P1 - P6. Each port
has eight I/O pins. Every I/O pin is individually configurable for input or output direction,
and each I/O line can be individually read or written to.Ports P1 and P2 have interrupt
capability. Each interrupt for the P1 and P2 I/O lines can be individually enabled and
configured to provide an interrupt on a rising edge or falling edge of an input signal.
All P1 I/O lines source a single interrupt vector, and all P2 I/O lines source a different,
single interrupt vector.
The digital I/O features include:
Independently programmable individual I/Os
Any combination of input or output
Individually configurable P1 and P2 interrupts
Independent input and output data registers
Individually configurable pull-up or pull-down resistors
2 Digital I/O Operation
The digital I/O is configured with user software. The setup and operation of the
digital I/O is discussed in the following sections.
2.1 Input Register PxIN
Each bit in each PxIN register reflects the value of the input signal at the corresponding
I/O pin when the pin is configured as I/O function.
Bit = 0: The input is low
Bit = 1: The input is high
Note: Writing to Read-Only Registers PxIN Writing to these read-only registers results in
increased current consumption while the write attempt is active.
2.2 Output Registers PxOUT
Each bit in each PxOUT register is the value to be output on the corresponding I/O pin
when the pin is configured as I/O function, output direction, and the pull-up/down resistor
is disabled.
Bit = 0: The output is low
Bit = 1: The output is high
If the pin’s pull?up/down resistor is enabled, the corresponding bit in the PxOUT register
selects pull-up or pull-down.
Bit = 0: The pin is pulled down
Bit = 1: The pin is pulled up
2.3 Direction Registers PxDIR
Each bit in each PxDIR register selects the direction of the corresponding I/O pin,
regardless of the selected function for the pin. PxDIR bits for I/O pins that are selected for
other functions must be set as required by the other function.
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
2.4 Pull Up/Down Resistor Enable Registers PxREN
Each bit in each PxREN register enables or disables the pull-up/down resistor of the
corresponding I/O pin. The corresponding bit in the PxOUT register selects if the pin is
pulled up or pulled down.
Bit = 0: Pull-up/down resistor disabled
Bit = 1: Pull-up/down resistor enabled
2.5 Function Select Registers PxSEL
Port pins are often multiplexed with other peripheral module functions. See the
device-specific data sheet to determine pin functions. Each PxSEL bit is used to select
the pin function ? I/O port or peripheral module function.
Bit = 0: I/O Function is selected for the pin
Bit = 1: Peripheral module function is selected for the pin
Setting PxSELx = 1 does not automatically set the pin direction. Other peripheral
module functions may require the PxDIRx bits to be configured according to the direction
needed for the module function. See the pin schematics in the device-specific datasheet.
[NOST]:
When any P1SELx or P2SELx bit is set, the corresponding pin’s interrupt
function is disabled. Therefore, signals on these pins will not generate P1 or P2 interrupts,
regardless of the state of the corresponding P1IE or P2IE bit.
When a port pin is selected as an input to a peripheral, the input signal to the
peripheral is a latched representation of the signal at the device pin. While PxSELx=1,
the internal input signal follows the signal at the pin. However, if the PxSELx=0, the input
to the peripheral maintains the value of the input signal at the device pin before the
PxSELx bit was reset.
2.6 P1 and P2 Interrupts
Each pin in ports P1 and P2 have interrupt capability, configured with the PxIFG,
PxIE, and PxIES registers. All P1 pins source a single interrupt vector,and all P2 pins
source a different single interrupt vector. The PxIFG register can be tested to determine
the source of a P1 or P2 interrupt.
Interrupt Flag Registers P1IFG, P2IFG . Each PxIFGx bit is the interrupt flag for its
corresponding I/O pin and is set when the selected input signal edge occurs at the pin.
All PxIFGx interrupt flags request an interrupt when their corresponding PxIE bit and the
GIE bit are set. Each PxIFG flag must be reset with software. Software can also set each
PxIFG flag, providing a way to generate a software initiated interrupt.
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
Only transitions, not static levels, cause interrupts. If any PxIFGx flag becomes set
during a Px interrupt service routine, or is set after the RETI instruction of a Px interrupt
service routine is executed, the set PxIFGx flag generates another interrupt. This ensures
that each transition is acknowledged.
[Note]:
PxIFG Flags When Changing PxOUT or PxDIR Writing to P1OUT, P1DIR, P2OUT,
or P2DIR can result in setting the corresponding P1IFG or P2IFG flags.
2.7 Interrupt Edge Select Registers P1IES, P2IES
Each PxIES bit selects the interrupt edge for the corresponding I/O pin.
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
[Note]:
Writing to PxIESx Writing to P1IES, or P2IES can result in setting the corresponding
interrupt flags.
PxIESx PxINx PxIFGx
0 → 1 0 : May be set
0 → 1 1 : Unchanged
1 → 0 0 : Unchanged
1 → 0 1 : May be set
Interrupt Enable P1IE, P2IE Each PxIE bit enables the associated PxIFG interrupt flag.
Bit = 0: The interrupt is disabled
Bit = 1: The interrupt is enabled
2.7 Configuring Unused Port Pins
Unused I/O pins should be configured as I/O function, output direction, and left
unconnected on the PC board, to prevent a floating input and reduce power
consumption. The value of the PxOUT bit is don’t care, since the pin is unconnected.
Alternatively, the integrated pull-up/down resistor can be enabled by setting the PxREN
bit of the unused pin to prevent the floating input. See chapter System Resets, Interrupts,
and Operating Modes for termination unused pins. |
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