VID
The AMD processor does not step the output voltage
commands up or down to the target voltage, but instead
passes only the target voltage to the ISL6323 through either
the PVI or SVI interface. The ISL6323 manages the resulting
VID-on-the-Fly transition in a controlled manner, supervising
a safe output voltage transition without discontinuity or
disruption. The ISL6323 begins slewing the DAC at
3.25mV/μs until the DAC and target voltage are equal. Thus,
the total time required for a dynamic VID transition is
dependent only on the size of the DAC change.
To further improve dynamic VID performance, ISL6323 also
implements a proprietary DAC smoothing feature. The
external series RC components connected between DVC
and FB limit any stair-stepping of the output voltage during a
VID-on-the-Fly transition.
Compensating Dynamic VID Transitions
During a VID transition, the resulting change in voltage on
the FB pin and the COMP pin causes an AC current to flow
through the error amplifier compensation components from
the FB to the COMP pin. This current then flows through the
feedback resistor, RFB, and can cause the output voltage to
overshoot or undershoot at the end of the VID transition. In
order to ensure the smooth transition of the output voltage
during a VID change, a VID-on-the-fly compensation
network is required. This network is composed of a resistor
and capacitor in series, RDVC and CDVC, between the DVC
and the FB pin.
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