1个3.0的,1个3.3的,都是 Project\STM32F10x_StdPeriph_Examples\TIM\TimeBase下的例子,连readme.txt里面写的都不一样
就是时钟设置里面,
3.0的是说
The TIMxCLK frequency is set to 36 MHz, the Prescaler is 4 so the TIM2 counter
clock is 7.2 MHz.
The TIM2 CC1 register value is equal to 49152,
CC1 update rate = TIM2 counter clock / CCR1_Val = 146.48 Hz,
so the TIM2 Channel 1 generates an interrupt each 6.8ms
3.3和3.4的一样,是说
The TIM2CLK frequency is set to SystemCoreClock / 2 (Hz), to get TIM2 counter
clock at 6 MHz so the Prescaler is computed as following:
- Prescaler = (TIM2CLK / TIM2 counter clock) - 1
SystemCoreClock is set to 72 MHz for Low-density, Medium-density, High-density
and Connectivity line devices and to 24 MHz for Low-Density Value line,
Medium-Density Value line and High-Density devices.
The TIM2 CC1 register value is equal to 40961,
CC1 update rate = TIM2 counter clock / CCR1_Val = 146.48 Hz,
so the TIM2 Channel 1 generates an interrupt each 6.8ms |
楼主
标题置顶
标题高亮
