有了解的吗？官方手册上是这样写的
Each Intel Cyclone 10 LP I/O bank has a VREF bus to accommodate voltage-referenced I/O standards. Each VREF pin is the reference source for its VREF group.
• If you use a VREF group for voltage-referenced I/O standards, connect the VREF pin for that group to the appropriate voltage level.
• If you do not use all the VREF groups in the I/O bank for voltage-referenced I/Ostandards, you can use the VREF pin in the unused voltage-referenced groups as regular I/O pins.
• The VREF pins are shorted together within the same I/O bank. If you use multiple VREF groups in the same I/O bank, you must power all the VREF pins with the same voltage level.
For example, if you have SSTL-2 Class I input pins in I/O bank 1 and you place them all in the VREFB1N[0] group, you must power VREFB1N[0] with 1.25 V. You can use the remaining VREFB1N[1..3] pins, if available, as I/O pins.
Note: If you use VREF pins as regular I/Os, the VREF pins have higher pin capacitance than regular user I/O pins. This affects the timing if the pins are used as inputs and outputs.
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