21ic电子技术开发论坛 › 综合技术交流 › 电子技术交流论坛 › SMBUS跟I2C 區別
返回列表 发新帖我要提问

SMBUS跟I2C 區別

[复制链接]
5609|1
 楼主| michael_li 发表于 2008-4-3 10:10 | 显示全部楼层 |阅读模式
SMBUS, I2c, TI, ic, AN
前段時間在21IC上看到有人說SMBUS跟I2C的區別：SMBUS可以自動復位，但是I2C不能。有點將信將疑，昨天翻看了一下SMBUS&nbsp;2.0&nbsp;SPEC，發現協議里面有寫他們的區別，不過其中并沒有說到自動復位的問題，主要區別就是電氣特性、電平上面的定義、時序和ACK&nbsp;and&nbsp;NACK的使用方面的，總體上SMBUS要求更高一點。而說到復位，SMBUS支持一個ARP&nbsp;reset，應該是slave&nbsp;address沖突的時候的reset。<br /><br />Differences&nbsp;between&nbsp;SMBus&nbsp;and&nbsp;I2C<br />While&nbsp;SMBus&nbsp;is&nbsp;derived&nbsp;from&nbsp;I2C,&nbsp;there&nbsp;are&nbsp;several&nbsp;major&nbsp;differences&nbsp;between&nbsp;the&nbsp;specifications&nbsp;of&nbsp;the&nbsp;two&nbsp;busses&nbsp;in&nbsp;the&nbsp;areas&nbsp;of&nbsp;electricals,&nbsp;timing,&nbsp;protocols&nbsp;and&nbsp;operating&nbsp;modes.<br /><br />DC&nbsp;specifications&nbsp;for&nbsp;SMBus&nbsp;and&nbsp;I2C<br />Both&nbsp;I2C&nbsp;and&nbsp;SMBus&nbsp;are&nbsp;capable&nbsp;of&nbsp;operating&nbsp;with&nbsp;mixed&nbsp;devices&nbsp;that&nbsp;have&nbsp;either&nbsp;fixed&nbsp;input&nbsp;levels&nbsp;(such&nbsp;as&nbsp;Smart&nbsp;Batteries)&nbsp;or&nbsp;input&nbsp;levels&nbsp;related&nbsp;to&nbsp;VDD.&nbsp;When&nbsp;mixing&nbsp;devices,&nbsp;the&nbsp;I2C&nbsp;specification&nbsp;defines&nbsp;the&nbsp;VDD&nbsp;to&nbsp;be&nbsp;5.0&nbsp;Volt&nbsp;+/-&nbsp;10%&nbsp;and&nbsp;the&nbsp;fixed&nbsp;input&nbsp;levels&nbsp;to&nbsp;be&nbsp;1.5&nbsp;and&nbsp;3.0&nbsp;Volts.&nbsp;Instead&nbsp;of&nbsp;relating&nbsp;the&nbsp;bus&nbsp;input&nbsp;levels&nbsp;to&nbsp;VDD,&nbsp;SMBus&nbsp;defines&nbsp;them&nbsp;to&nbsp;be&nbsp;fixed&nbsp;at&nbsp;0.8&nbsp;and&nbsp;2.1&nbsp;Volts.&nbsp;This&nbsp;SMBus&nbsp;specification&nbsp;allows&nbsp;for&nbsp;bus&nbsp;implementations&nbsp;with&nbsp;VDD&nbsp;ranging&nbsp;from&nbsp;3&nbsp;to&nbsp;5&nbsp;Volts&nbsp;+/-&nbsp;10%.&nbsp;SMBus&nbsp;has&nbsp;relaxed&nbsp;the&nbsp;initial&nbsp;requirement&nbsp;for&nbsp;fixed&nbsp;input&nbsp;levels&nbsp;of&nbsp;0.6&nbsp;and&nbsp;1.4&nbsp;Volts,&nbsp;in&nbsp;order&nbsp;to&nbsp;reduce&nbsp;the&nbsp;cost&nbsp;of&nbsp;SMBus&nbsp;compliant&nbsp;devices.&nbsp;Devices&nbsp;compliant&nbsp;with&nbsp;the&nbsp;1.0&nbsp;specification&nbsp;of&nbsp;SMBus&nbsp;will&nbsp;still&nbsp;operate&nbsp;with&nbsp;higher&nbsp;versions&nbsp;of&nbsp;SMBus.<br />A&nbsp;second&nbsp;difference&nbsp;in&nbsp;the&nbsp;DC&nbsp;parameters&nbsp;between&nbsp;I2C&nbsp;and&nbsp;SMBus&nbsp;is&nbsp;in&nbsp;the&nbsp;power&nbsp;consumption&nbsp;of&nbsp;the&nbsp;low&nbsp;power&nbsp;version&nbsp;of&nbsp;the&nbsp;bus.&nbsp;SMBus&nbsp;low-power&nbsp;electricals&nbsp;are&nbsp;designed&nbsp;to&nbsp;accommodate&nbsp;extremely&nbsp;low&nbsp;power&nbsp;consumption&nbsp;devices,&nbsp;such&nbsp;as&nbsp;the&nbsp;control&nbsp;circuitry&nbsp;within&nbsp;a&nbsp;Smart&nbsp;Battery.&nbsp;These&nbsp;devices&nbsp;have&nbsp;limited&nbsp;current&nbsp;sinking&nbsp;capabilities&nbsp;and&nbsp;a&nbsp;low&nbsp;power&nbsp;consumption&nbsp;bus&nbsp;is&nbsp;essential&nbsp;for&nbsp;maintaining&nbsp;communications&nbsp;without&nbsp;draining&nbsp;the&nbsp;battery&nbsp;of&nbsp;a&nbsp;mobile&nbsp;computer.&nbsp;As&nbsp;a&nbsp;result,&nbsp;SMBus&nbsp;sets&nbsp;more&nbsp;stringent&nbsp;DC&nbsp;requirements&nbsp;than&nbsp;I2C.&nbsp;One&nbsp;of&nbsp;the&nbsp;main&nbsp;differences&nbsp;is&nbsp;the&nbsp;IOL&nbsp;specification&nbsp;for&nbsp;VOL&nbsp;=&nbsp;0.4&nbsp;Volts.<br />SMBus&nbsp;low-power&nbsp;devices&nbsp;are&nbsp;required&nbsp;to&nbsp;sink&nbsp;a&nbsp;minimum&nbsp;of&nbsp;100&nbsp;uA&nbsp;as&nbsp;opposed&nbsp;to&nbsp;3mA&nbsp;specified&nbsp;for&nbsp;I2C&nbsp;devices&nbsp;for&nbsp;the&nbsp;same&nbsp;VOL.<br />A&nbsp;third&nbsp;difference&nbsp;is&nbsp;in&nbsp;the&nbsp;specification&nbsp;of&nbsp;the&nbsp;maximum&nbsp;leakage&nbsp;current&nbsp;for&nbsp;each&nbsp;device&nbsp;connected&nbsp;to&nbsp;the&nbsp;bus.&nbsp;I2C&nbsp;specifies&nbsp;the&nbsp;maximum&nbsp;leakage&nbsp;current&nbsp;to&nbsp;be&nbsp;10&nbsp;uA.&nbsp;SMBus&nbsp;version&nbsp;1.0&nbsp;specified&nbsp;maximum&nbsp;leakage&nbsp;current&nbsp;of&nbsp;1&nbsp;uA.&nbsp;Version&nbsp;1.1&nbsp;of&nbsp;the&nbsp;SMBus&nbsp;specification&nbsp;relaxes&nbsp;the&nbsp;leakage&nbsp;requirements&nbsp;to&nbsp;5&nbsp;uA,&nbsp;in&nbsp;order&nbsp;to&nbsp;reduce&nbsp;the&nbsp;cost&nbsp;of&nbsp;testing&nbsp;of&nbsp;SMBus&nbsp;devices.<br />Finally,&nbsp;SMBus&nbsp;does&nbsp;not&nbsp;specify&nbsp;a&nbsp;maximum&nbsp;bus&nbsp;capacitance.&nbsp;Instead&nbsp;it&nbsp;specifies&nbsp;the&nbsp;IPULLDOWN&nbsp;maximum&nbsp;of&nbsp;350&nbsp;uA.&nbsp;Bus&nbsp;capacitance&nbsp;can&nbsp;be&nbsp;calculated&nbsp;taking&nbsp;into&nbsp;consideration&nbsp;the&nbsp;maximum&nbsp;rise&nbsp;time&nbsp;and&nbsp;IPULLDOWN.<br />The&nbsp;following&nbsp;table&nbsp;lists&nbsp;the&nbsp;main&nbsp;differences&nbsp;among&nbsp;the&nbsp;DC&nbsp;parameters&nbsp;for&nbsp;I2C&nbsp;and&nbsp;SMBus.<br />&nbsp;<br />Table&nbsp;10:&nbsp;DC&nbsp;parameter&nbsp;differences&nbsp;between&nbsp;SMBus&nbsp;and&nbsp;I2C<br /><br /><br /><br /><br /><br />Timing&nbsp;specification&nbsp;differences&nbsp;between&nbsp;SMBus&nbsp;and&nbsp;I2C<br /><br />There&nbsp;are&nbsp;differences&nbsp;in&nbsp;the&nbsp;timing&nbsp;specifications&nbsp;between&nbsp;I2C&nbsp;and&nbsp;SMBus.&nbsp;As&nbsp;in&nbsp;the&nbsp;case&nbsp;of&nbsp;DC&nbsp;specification,&nbsp;proper&nbsp;understanding&nbsp;of&nbsp;the&nbsp;parameters&nbsp;is&nbsp;needed&nbsp;in&nbsp;order&nbsp;to&nbsp;combine&nbsp;reliably&nbsp;I2C&nbsp;with&nbsp;SMBus&nbsp;devices.<br />SMBus&nbsp;defines&nbsp;a&nbsp;minimum&nbsp;bus&nbsp;clock&nbsp;frequency&nbsp;FSMB&nbsp;of&nbsp;10&nbsp;KHz.&nbsp;I2C&nbsp;does&nbsp;not&nbsp;specify&nbsp;any&nbsp;minimum&nbsp;bus&nbsp;frequency.&nbsp;Besides&nbsp;maintaining&nbsp;effective&nbsp;bus&nbsp;throughput,&nbsp;this&nbsp;SMBus&nbsp;specification&nbsp;parameter&nbsp;can&nbsp;be&nbsp;used&nbsp;as&nbsp;a&nbsp;simple&nbsp;way&nbsp;to&nbsp;detect&nbsp;a&nbsp;bus&nbsp;idle&nbsp;condition&nbsp;(in&nbsp;addition&nbsp;or&nbsp;in&nbsp;lieu&nbsp;of&nbsp;detecting&nbsp;each&nbsp;STOP&nbsp;condition)&nbsp;as&nbsp;well&nbsp;as&nbsp;to&nbsp;implement&nbsp;bit&nbsp;timeout.<br />SMBus&nbsp;defines&nbsp;a&nbsp;data&nbsp;hold&nbsp;time,&nbsp;the&nbsp;time&nbsp;during&nbsp;which&nbsp;SMBDAT&nbsp;must&nbsp;remain&nbsp;valid&nbsp;from&nbsp;the&nbsp;falling&nbsp;edge&nbsp;of&nbsp;SMBCLK,&nbsp;of&nbsp;300&nbsp;nS.&nbsp;I2C&nbsp;defines&nbsp;this&nbsp;hold&nbsp;time&nbsp;as&nbsp;zero.<br />Maximum&nbsp;clock&nbsp;frequency&nbsp;for&nbsp;SMBus&nbsp;is&nbsp;defined&nbsp;at&nbsp;100&nbsp;KHz.&nbsp;I2C&nbsp;provides&nbsp;two&nbsp;modes&nbsp;of&nbsp;operation.&nbsp;The&nbsp;STANDARD&nbsp;MODE&nbsp;up&nbsp;to&nbsp;100&nbsp;KHz&nbsp;and&nbsp;the&nbsp;FAST-MODE&nbsp;up&nbsp;to&nbsp;400&nbsp;KHz.&nbsp;SMBus&nbsp;defines&nbsp;a&nbsp;clock&nbsp;low&nbsp;time-out,&nbsp;TTIMEOUT&nbsp;of&nbsp;35&nbsp;ms.&nbsp;I2C&nbsp;does&nbsp;not&nbsp;specify&nbsp;any&nbsp;timeout&nbsp;limit.<br />SMBus&nbsp;specifies&nbsp;TLOW:&nbsp;SEXT&nbsp;as&nbsp;the&nbsp;cumulative&nbsp;clock&nbsp;low&nbsp;extend&nbsp;time&nbsp;for&nbsp;a&nbsp;slave&nbsp;device.&nbsp;I2C&nbsp;does&nbsp;not&nbsp;have&nbsp;a&nbsp;similar&nbsp;specification.<br />SMBus&nbsp;specifies&nbsp;TLOW:&nbsp;MEXT&nbsp;as&nbsp;the&nbsp;cumulative&nbsp;clock&nbsp;low&nbsp;extend&nbsp;time&nbsp;for&nbsp;a&nbsp;master&nbsp;device.&nbsp;Again&nbsp;I2C&nbsp;does&nbsp;not&nbsp;have&nbsp;a&nbsp;similar&nbsp;specification.<br />SMBus&nbsp;defines&nbsp;both&nbsp;rise&nbsp;and&nbsp;fall&nbsp;time&nbsp;of&nbsp;bus&nbsp;signals.&nbsp;I2C&nbsp;does&nbsp;not.<br />The&nbsp;SMBus&nbsp;time-out&nbsp;specifications&nbsp;do&nbsp;not&nbsp;preclude&nbsp;I2C&nbsp;devices&nbsp;co-operating&nbsp;reliably&nbsp;on&nbsp;the&nbsp;SMBus.&nbsp;It&nbsp;is&nbsp;the&nbsp;responsibility&nbsp;of&nbsp;the&nbsp;designer&nbsp;to&nbsp;ensure&nbsp;that&nbsp;I2C&nbsp;devices&nbsp;are&nbsp;not&nbsp;going&nbsp;to&nbsp;violate&nbsp;these&nbsp;bus&nbsp;timing&nbsp;parameters.<br /><br /><br />Other&nbsp;differences<br /><br />ACK&nbsp;and&nbsp;NACK&nbsp;usage<br />There&nbsp;are&nbsp;the&nbsp;following&nbsp;differences&nbsp;in&nbsp;the&nbsp;use&nbsp;of&nbsp;the&nbsp;NACK&nbsp;bus&nbsp;signaling:<br />In&nbsp;I2C,&nbsp;a&nbsp;slave&nbsp;receiver&nbsp;is&nbsp;allowed&nbsp;not&nbsp;to&nbsp;acknowledge&nbsp;the&nbsp;slave&nbsp;address,&nbsp;if&nbsp;for&nbsp;example&nbsp;is&nbsp;unable&nbsp;to&nbsp;receive&nbsp;because&nbsp;it’s&nbsp;performing&nbsp;some&nbsp;real&nbsp;time&nbsp;task.&nbsp;SMBus&nbsp;requires&nbsp;devices&nbsp;to&nbsp;acknowledge&nbsp;their&nbsp;own&nbsp;address&nbsp;always,&nbsp;as&nbsp;a&nbsp;mechanism&nbsp;to&nbsp;detect&nbsp;a&nbsp;removable&nbsp;device’s&nbsp;presence&nbsp;on&nbsp;the&nbsp;bus&nbsp;(battery,&nbsp;docking&nbsp;station,&nbsp;etc.)<br />I2C&nbsp;specifies&nbsp;that&nbsp;a&nbsp;slave&nbsp;device,&nbsp;although&nbsp;it&nbsp;may&nbsp;acknowledge&nbsp;its&nbsp;own&nbsp;address,&nbsp;some&nbsp;time&nbsp;later&nbsp;in&nbsp;the&nbsp;transfer&nbsp;it&nbsp;may&nbsp;decide&nbsp;that&nbsp;it&nbsp;cannot&nbsp;receive&nbsp;any&nbsp;more&nbsp;data&nbsp;bytes.&nbsp;The&nbsp;I2C&nbsp;specifies,&nbsp;that&nbsp;the&nbsp;device&nbsp;may&nbsp;indicate&nbsp;this&nbsp;by&nbsp;generating&nbsp;the&nbsp;not&nbsp;acknowledge&nbsp;on&nbsp;the&nbsp;first&nbsp;byte&nbsp;to&nbsp;follow.&nbsp;Besides&nbsp;to&nbsp;indicate&nbsp;a&nbsp;slave&nbsp;device&nbsp;busy&nbsp;condition,&nbsp;SMBus&nbsp;is&nbsp;using&nbsp;the&nbsp;NACK&nbsp;mechanism&nbsp;also&nbsp;to&nbsp;indicate&nbsp;the&nbsp;reception&nbsp;of&nbsp;an&nbsp;invalid&nbsp;command&nbsp;or&nbsp;data.&nbsp;Since&nbsp;such&nbsp;a&nbsp;condition&nbsp;may&nbsp;occur&nbsp;on&nbsp;the&nbsp;last&nbsp;byte&nbsp;of&nbsp;the&nbsp;transfer,&nbsp;it&nbsp;is&nbsp;required&nbsp;that&nbsp;SMBus&nbsp;devices&nbsp;have&nbsp;the&nbsp;ability&nbsp;to&nbsp;generate&nbsp;the&nbsp;not&nbsp;acknowledge&nbsp;after&nbsp;the&nbsp;transfer&nbsp;of&nbsp;each&nbsp;byte&nbsp;and&nbsp;before&nbsp;the&nbsp;completion&nbsp;of&nbsp;the&nbsp;transaction.&nbsp;This&nbsp;is&nbsp;important&nbsp;because&nbsp;SMBus&nbsp;does<br />not&nbsp;provide&nbsp;any&nbsp;other&nbsp;resend&nbsp;signaling.&nbsp;This&nbsp;difference&nbsp;in&nbsp;the&nbsp;use&nbsp;of&nbsp;the&nbsp;NACK&nbsp;signaling&nbsp;has&nbsp;implications&nbsp;on&nbsp;the&nbsp;specific&nbsp;implementation&nbsp;of&nbsp;the&nbsp;SMBus&nbsp;port,&nbsp;especially&nbsp;in&nbsp;devices&nbsp;that&nbsp;handle&nbsp;critical&nbsp;system&nbsp;data&nbsp;such&nbsp;as&nbsp;the&nbsp;SMBus&nbsp;host&nbsp;and&nbsp;the&nbsp;SBS&nbsp;components.<br /><br /><br />SMBus&nbsp;protocols<br />Each&nbsp;message&nbsp;transaction&nbsp;on&nbsp;SMBus&nbsp;follows&nbsp;the&nbsp;format&nbsp;of&nbsp;one&nbsp;of&nbsp;the&nbsp;defined&nbsp;SMBus&nbsp;protocols.&nbsp;The&nbsp;SMBus&nbsp;protocols&nbsp;are&nbsp;a&nbsp;subset&nbsp;of&nbsp;the&nbsp;data&nbsp;transfer&nbsp;formats&nbsp;defined&nbsp;in&nbsp;the&nbsp;I2C&nbsp;specifications.&nbsp;I2C&nbsp;devices&nbsp;that&nbsp;can&nbsp;be&nbsp;accessed&nbsp;through&nbsp;one&nbsp;of&nbsp;the&nbsp;SMBus&nbsp;protocols&nbsp;are&nbsp;compatible&nbsp;with&nbsp;the&nbsp;SMBus&nbsp;specifications.&nbsp;I2C&nbsp;devices&nbsp;that&nbsp;do&nbsp;not&nbsp;adhere&nbsp;to&nbsp;these&nbsp;protocols&nbsp;cannot&nbsp;be&nbsp;accessed&nbsp;by&nbsp;standard&nbsp;methods&nbsp;as&nbsp;defined&nbsp;in&nbsp;the&nbsp;SMBus&nbsp;and&nbsp;ACPI&nbsp;specifications.<br /><br />
回复

收藏 举报

相关帖子
nwb1010 发表于 2008-4-22 22:43 | 显示全部楼层

ddddddddddddd

  
回复

收藏 举报

返回列表 发新帖
高级模式
B Color Image Link Quote Code Smilies
您需要登录后才可以回帖 登录 | 注册

本版积分规则

michael_li

118

主题

3819

帖子

0

粉丝
快速回复 在线客服 返回列表 返回顶部