/****************************************************************************
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V1.00
* [url=home.php?mod=space&uid=247401]@brief[/url] Demonstrate how to trigger DAC by timer.
*
* [url=home.php?mod=space&uid=17282]@CopyRight[/url] (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include <stdio.h>
#include "NuMicro.h"
const uint16_t g_au16Sine[] = {2047, 2251, 2453, 2651, 2844, 3028, 3202, 3365, 3515, 3650, 3769, 3871, 3954,
4019, 4064, 4088, 4095, 4076, 4040, 3984, 3908, 3813, 3701, 3573, 3429, 3272,
3102, 2921, 2732, 2536, 2335, 2132, 1927, 1724, 1523, 1328, 1141, 962, 794,
639, 497, 371, 262, 171, 99, 45, 12, 0, 7, 35, 84, 151,
238, 343, 465, 602, 754, 919, 1095, 1281, 1475, 1674, 1876
};
const uint32_t g_u32ArraySize = sizeof(g_au16Sine) / sizeof(uint16_t);
static uint32_t g_u32Index = 0;
void DAC_IRQHandler(void)
{
if(DAC_GET_INT_FLAG(DAC0, 0))
{
if(g_u32Index == g_u32ArraySize)
g_u32Index = 0;
else
{
DAC_WRITE_DATA(DAC0, 0, g_au16Sine[g_u32Index++]);
/* Clear the DAC conversion complete finish flag */
DAC_CLR_INT_FLAG(DAC0, 0);
}
}
return;
}
void SYS_Init(void)
{
/* Set PF multi-function pins for XT1_OUT(PF.2) and XT1_IN(PF.3) */
SYS->GPF_MFPL = (SYS->GPF_MFPL & (~SYS_GPF_MFPL_PF2MFP_Msk)) | XT1_OUT_PF2;
SYS->GPF_MFPL = (SYS->GPF_MFPL & (~SYS_GPF_MFPL_PF3MFP_Msk)) | XT1_IN_PF3;
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable HIRC clock (Internal RC 22.1184 MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Wait for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Select HCLK clock source as HIRC and and HCLK source divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set PLL to Power-down mode and PLLSTB bit in CLK_STATUS register will be cleared by hardware. */
CLK_DisablePLL();
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Enable PLL */
CLK->PLLCTL = CLK_PLLCTL_128MHz_HIRC;
/* Waiting for PLL stable */
CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
/* Select HCLK clock source as PLL and HCLK source divider as 2 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
/* Enable DAC module clock */
CLK_EnableModuleClock(DAC_MODULE);
/* Enable Timer 0 module clock */
CLK_EnableModuleClock(TMR0_MODULE);
/* Select timer 0 module clock source as HXT */
CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_HXT, 0);
/*
Note:
Because VCOM pins(UART0_RXD_PB12 and UART0_TXD_PB13) of NuMaker-PFM-M261 board are conflict to DAC0_OUT_PB12 and DAC1_OUT_PB13 pins.
So, this DAC sample code takes UART0_RXD_PA0 and UART0_TXD_PA1 as debug port.
*/
/* Set multi-function pins for UART0 RXD and TXD */
SYS->GPA_MFPL = (SYS->GPA_MFPL & (~(UART0_RXD_PA0_Msk | UART0_TXD_PA1_Msk))) | UART0_RXD_PA0 | UART0_TXD_PA1;
/* Set PB multi-function pin for DAC voltage output */
SYS->GPB_MFPH = (SYS->GPB_MFPH & ~SYS_GPB_MFPH_PB12MFP_Msk) | DAC0_OUT_PB12;
/* Disable digital input path of analog pin DAC0_OUT to prevent leakage */
GPIO_DISABLE_DIGITAL_PATH(PB, (1ul << 12));
/* Lock protected registers */
SYS_LockReg();
}
int32_t main(void)
{
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
printf("\n");
printf("+------------------------------------------------------------------------+\n");
printf("| DAC Driver Sample Code |\n");
printf("+------------------------------------------------------------------------+\n");
printf("\nHit any key to start trigger DAC by Timer 0!\n");
getchar();
/* Set the timer 0 trigger,enable DAC even trigger mode and enable D/A converter */
DAC_Open(DAC0, 0, DAC_TIMER0_TRIGGER);
/* The DAC conversion settling time is 1us */
DAC_SetDelayTime(DAC0, 1);
/* Set DAC 12-bit holding data */
DAC_WRITE_DATA(DAC0, 0, g_au16Sine[g_u32Index]);
/* Clear the DAC conversion complete finish flag for safe */
DAC_CLR_INT_FLAG(DAC0, 0);
/* Enable the DAC interrupt. */
DAC_ENABLE_INT(DAC0, 0);
NVIC_EnableIRQ(DAC_IRQn);
/* Configure Timer 0 frequency to 1000Hz and start it. */
TIMER_Open(TIMER0, TIMER_PERIODIC_MODE, 1000);
TIMER_SetTriggerTarget(TIMER0, TIMER_TRG_TO_DAC);
TIMER_Start(TIMER0);
while(1);
}
/*** (C) COPYRIGHT 2019 Nuvoton Technology Corp. ***/