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PIC24FV16KM202 内部振荡FRCPLL如何实现32MHz系统时钟工作?

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fancychg1|  楼主 | 2019-12-11 10:21 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
本帖最后由 fancychg1 于 2019-12-11 20:12 编辑

PIC24FV16KM202 内部振荡FRCPLL如何实现32MHz系统时钟工作?
需要关注与设置哪几个关键寄存器与配置字,及关键程序语句?目前我设置了FRCPLL但只观察到CLKO输出8MHz.// FBS
#pragma config BWRP = OFF               // Boot Segment Write Protect (Disabled)
#pragma config BSS = OFF                // Boot segment Protect (No boot program flash segment)

// FGS
#pragma config GWRP = OFF               // General Segment Write Protect (General segment may be written)
#pragma config GCP = OFF                // General Segment Code Protect (No Protection)

// FOSCSEL
#pragma config FNOSC = FRCPLL           // Oscillator Select (Fast RC Oscillator with Postscaler and PLL Module (FRCDIV+PLL))
#pragma config SOSCSRC = DIG            // SOSC Source Type (Analog Mode for use with crystal)
#pragma config LPRCSEL = HP             // LPRC Oscillator Power and Accuracy (High Power, High Accuracy Mode)
#pragma config IESO = ON                // Internal External Switch Over bit (Internal External Switchover mode enabled (Two-speed Start-up enabled))

// FOSC
#pragma config POSCMOD = NONE           // Primary Oscillator Configuration bits (Primary oscillator disabled)
#pragma config OSCIOFNC = IO          // CLKO Enable Configuration bit (CLKO output signal enabled)
#pragma config POSCFREQ = HS            // Primary Oscillator Frequency Range Configuration bits (Primary oscillator/external clock input frequency greater than 8MHz)
#pragma config SOSCSEL = SOSCHP         // SOSC Power Selection Configuration bits (Secondary Oscillator configured for high-power operation)
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor Selection (Both Clock Switching and Fail-safe Clock Monitor are disabled)

// FWDT
#pragma config WDTPS = PS32768          // Watchdog Timer Postscale Select bits (1:32768)
#pragma config FWPSA = PR128            // WDT Prescaler bit (WDT prescaler ratio of 1:128)
#pragma config FWDTEN = OFF              // Watchdog Timer Enable bits (WDT enabled in hardware)
#pragma config WINDIS = OFF             // Windowed Watchdog Timer Disable bit (Standard WDT selected(windowed WDT disabled))

// FPOR
#pragma config BOREN = BOR3             // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware, SBOREN bit disabled)
#pragma config RETCFG = OFF             //  (Retention regulator is not available)
#pragma config PWRTEN = ON              // Power-up Timer Enable bit (PWRT enabled)
#pragma config I2C1SEL = PRI            // Alternate I2C1 Pin Mapping bit (Use Default SCL1/SDA1 Pins For I2C1)
#pragma config BORV = V18               // Brown-out Reset Voltage bits (Brown-out Reset set to lowest voltage (1.8V))
#pragma config MCLRE = ON               // MCLR Pin Enable bit (RA5 input pin disabled, MCLR pin enabled)

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ynwa| | 2019-12-11 11:57 | 只看该作者
配置寄存器FNOSC选择FRCDIVPLL,POSCCMD配置位disable。在OSCCON,CLKDIV控制寄存器中选择内部8MHz。

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fancychg1|  楼主 | 2019-12-11 14:30 | 只看该作者
本帖最后由 fancychg1 于 2019-12-21 15:27 编辑
ynwa 发表于 2019-12-11 11:57
配置寄存器FNOSC选择FRCDIVPLL,POSCCMD配置位disable。在OSCCON,CLKDIV控制寄存器中选择内部8MHz。 ...

好像没有你说的那样设置呢。你有用过这个芯片?只有选择FRCPLL或FRCDIV,只得到8MHz,没得到32MHz。
需要添加指令 CLKDIVbits.RCDIV=0;

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