Reading ST0 captures（捕获） the current value of the 24-bit counter. Thus, the ST0 register must be read before ST1 and ST2 to capture a correct Sleep Timer count value.
When a timer compare occurs the interrupt flag STIF is asserted.
The current timer value is updated each time a positive clock edge on the 32 kHz clock is detected by the system clock. Thus, when returning from PM1/2/3 (where the system clock is shut down) the Sleep Timer value in ST2:ST1:ST0 is not up-to-date if a positive edge on the 32 kHz clock has not been detected yet. To ensure an updated value is read, wait for a positive transition on the 32 kHz clock by polling（轮询） the SLEEPSTA.CLK32K bit, before reading the Sleep Timer value.
The interrupt enable bit for the ST interrupt is IEN0.STIE, and the interrupt flag is IRCON.STIF.
当运行在除了PM3之外的所有供电模式，睡眠定时器才会运行。因此，睡眠定时器的值在PM3模式下不保存。在PM1和PM2模式下，睡眠定时器捕获事件用来唤醒设备到active模式进行active操作。The default value of the compare value after reset is 0xFF FFFF。
The Sleep Timer compare can also be used as a DMA trigger, here I don't want to talk about.
Note that： if supply voltage drops below 2 V while in PM2, 睡眠间隔 might be affected.
当设置了已选I/O 引脚的中断标志，且32 kHz 时钟检测到这一事件时，发生定时器捕获。 Sleep Timer capture is enabled by setting STCC.PORT[1:0] and STCC.PIN[2:0] to the I/O pin that is to be used to trigger the capture. When STCS.VALID goes high, the capture value in STCV2:STCV1:STCV0 can be read.
It is not possible to switch input capture pin while capture is enabled. Capture must be disabled before a new input capture pin can be selected. To disable capture follow these steps (if disabling interrupts for up to half a 32 kHz cycle (~15.26 ms) is OK):
1. Disable interrupts
2. Wait until SLEEPSTA.CLK32K is high.
3. Set STCC.PORT[1:0] to 3. This disables capture.
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