本帖最后由 ywqxmut 于 2020-2-12 17:01 编辑
使用IP生成向导生成IP后例化，
用ISE14.7，编译报错如下：
ERROR:Place:1333 - Following IOB's that have input/output programming are locked
to the bank 1 that does not support such values
IO Standard: Name = LVDS_25, VREF = NR, VCCO = 2.50, TERM = NONE, DIR =
BIDIR, DRIVE_STR = NR
List of locked IOB's:
u_pic_gen/u_ddr3_intf/u_ddr3/memc5_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrap
per_inst/mcbx_dram_dqs
u_pic_gen/u_ddr3_intf/u_ddr3/memc5_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrap
per_inst/mcbx_dram_dqs_n
u_pic_gen/u_ddr3_intf/u_ddr3/memc5_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrap
per_inst/mcbx_dram_udqs_n
u_pic_gen/u_ddr3_intf/u_ddr3/memc5_wrapper_inst/mcb_ui_top_inst/mcb_raw_wrap
per_inst/mcbx_dram_udqs
ERROR:Pack:1654 - The timing-driven placement phase encountered an error.
搜过几个类似的帖子，年代久远不说，且没有看到解决的方式。
//=============例化代码
//enable bank5对应的DDR接口 4 fifo 双向
ddr3_intf u_ddr3_intf(
.c5_sys_clk (clk_intf ),
.c5_sys_rst_i (rst_n_sys ),
.c5_p0_cmd_clk (clk_intf),
.c5_p0_cmd_en (c5_p0_cmd_en),
.c5_p0_cmd_instr (c5_p0_cmd_instr),
.c5_p0_cmd_bl (c5_p0_cmd_bl ),
.c5_p0_cmd_byte_addr (srm_op_addr),
.c5_p0_cmd_empty (c5_p0_cmd_empty ),
.c5_p0_cmd_full (c5_p0_cmd_full ),
.c5_p0_wr_clk (c5_p0_wr_clk ),
.c5_p0_wr_en (c5_p0_wr_en ),
.c5_p0_wr_mask (c5_p0_wr_mask ),
.c5_p0_wr_data (c5_p0_wr_data ),
.c5_p0_wr_full (c5_p0_wr_full ),
.c5_p0_wr_empty (c5_p0_wr_empty )
//.c5_p0_wr_count (c5_p0_wr_count ),
//.c5_p0_wr_underrun (c5_p0_wr_underrun ),
//.c5_p0_wr_error (c5_p0_wr_error ),
//.c5_p0_rd_clk (c5_p0_rd_clk ),
//.c5_p0_rd_en (c5_p0_rd_en ),
//.c5_p0_rd_data (c5_p0_rd_data ),
//.c5_p0_rd_full (c5_p0_rd_full ),
//.c5_p0_rd_empty (c5_p0_rd_empty ),
//.c5_p0_rd_count (c5_p0_rd_count ),
//.c5_p0_rd_overflow (c5_p0_rd_overflow ),
//.c5_p0_rd_error (c5_p0_rd_error )
);
//=============例化代码
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