实测STM32F417ZG的FSMC速度，请香主指教！

只看该作者 · 2011-12-16 15:20

* 5. This file configures the system clock as follows:
  *=============================================================================
  *=============================================================================
  *       Supported STM32F4xx device revision | Rev A
  *-----------------------------------------------------------------------------
  *       System Clock source                   | PLL(HSI)
  *-----------------------------------------------------------------------------
  *       SYSCLK(Hz)                            | 168000000
  *-----------------------------------------------------------------------------
  *       HCLK(Hz)                            | 168000000
  *-----------------------------------------------------------------------------
  *       AHB Prescaler                         | 1
  *-----------------------------------------------------------------------------
  *       APB1 Prescaler                      | 4
  *-----------------------------------------------------------------------------
  *       APB2 Prescaler                      | 2
  *-----------------------------------------------------------------------------
  *       HSE Frequency(Hz)                   | 25000000
  *-----------------------------------------------------------------------------
  *       PLL_M                               | 16
  *-----------------------------------------------------------------------------
  *       PLL_N                               | 336
  *-----------------------------------------------------------------------------
  *       PLL_P                               | 2
  *-----------------------------------------------------------------------------
  *       PLL_Q                               | 7
  *-----------------------------------------------------------------------------
  *       PLLI2S_N                            | NA
  *-----------------------------------------------------------------------------
  *       PLLI2S_R                            | NA
  *-----------------------------------------------------------------------------
  *       I2S input clock                      | NA
  *-----------------------------------------------------------------------------
  *       VDD(V)                               | 3.3
  *-----------------------------------------------------------------------------
  *       Main regulator output voltage       | Scale1 mode
  *-----------------------------------------------------------------------------
  *       Flash Latency(WS)                   | 5
  *-----------------------------------------------------------------------------
  *       Prefetch Buffer                      | OFF
  *-----------------------------------------------------------------------------
  *       Instruction cache                   | ON
  *-----------------------------------------------------------------------------
  *       Data cache                            | ON
  *-----------------------------------------------------------------------------
  *       Require 48MHz for USB OTG FS,       | Disabled
  *       SDIO and RNG clock                   |
  *-----------------------------------------------------------------------------
  *=============================================================================

以上是通过ST自带的时钟配置工具产生的，初始化！

只看该作者 · 2011-12-16 15:20

{
FSMC_NORSRAMInitTypeDef       FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef  p;
GPIO_InitTypeDef             GPIO_InitStructure;

/* Enable GPIOs clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
                        RCC_AHB1Periph_GPIOG, ENABLE);
/* Enable FSMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
+                      SRAM pins assignment                                  +
+-------------------+--------------------+------------------+------------------+
| PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4  <-> FSMC_NOE | PE3  <-> FSMC_A19  | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5  <-> FSMC_NWE | PE4  <-> FSMC_A20  | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8  <-> FSMC_D13 | PE5  <-> FSMC_A21  | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9  <-> FSMC_D14 | PE7  <-> FSMC_D4 | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE8  <-> FSMC_D5 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE3 |
| PD11 <-> FSMC_A16 | PE9  <-> FSMC_D6 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE10 <-> FSMC_D7 | PF14 <-> FSMC_A8 |
| PD13 <-> FSMC_A18 | PE11 <-> FSMC_D8 | PF15 <-> FSMC_A9 |
| PD14 <-> FSMC_D0  | PE12 <-> FSMC_D9 |------------------+
| PD15 <-> FSMC_D1  | PE13 <-> FSMC_D10  |
|                | PE14 <-> FSMC_D11  |
| | PE15 <-> FSMC_D12  |
+-------------------+--------------------+
*/

/* GPIOD configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_4  | GPIO_Pin_5  |
                              GPIO_Pin_8  | GPIO_Pin_9  | GPIO_Pin_10 | GPIO_Pin_11 |
                              GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD, &GPIO_InitStructure);

/* GPIOE configuration */
GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_3  | GPIO_Pin_4  |
                              GPIO_Pin_5  | GPIO_Pin_7  | GPIO_Pin_8  | GPIO_Pin_9  |
                              GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 |
                              GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);

/* GPIOF configuration */
GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1 | GPIO_Pin_2  | GPIO_Pin_3 |
                              GPIO_Pin_4  | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13|
                              GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);

/* GPIOG configuration */
GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource10, GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0  | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 |
                              GPIO_Pin_4  | GPIO_Pin_5  | GPIO_Pin_10;
GPIO_Init(GPIOG, &GPIO_InitStructure);

/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime  = 0;
p.FSMC_DataSetupTime = 0;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode  = FSMC_AccessMode_A;

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

/*!< Enable FSMC Bank1_SRAM3 Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);

volatile static int test = 1;
while (test == 1) {
   volatile unsigned int value = *((volatile unsigned int *)0x68000000);
}
while (test == 2) {
      *((volatile unsigned int *)0x68000000) = 0xa5a5ff00;
}
}

只看该作者 · 2011-12-16 15:22

以上是测试外部的FSMC程序，不知是否有误，
经过测量NE引脚本的频率
RD时为9.259MHZ
WR时为11.12MHZ

香主，不知我测量的方法是否有误！

只看该作者 · 2011-12-16 15:31

香主这个结果不太满意，不知是不是我的测量方法不对！
请香主指教！

只看该作者 · 2011-12-16 15:50

不好意思，测量方法不对，目前测量FSMC可以的RD时NE的速度为16.39MHZ，使用了如下的方法：
即减少while(test == 1)判断的开销！不知此方法是否还有误！

volatile static int test = 0;
volatile unsigned int value;
while (test == 1) {
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
   value = *((volatile unsigned int *)0x68000000);
}

只看该作者 · 2012-6-13 11:54

测试还是有问题, 你读取的是32bit数据, fsmc要读取两次,
应该是 value = *((volatile unsigned short *)0x68000000);

你改下,在测试,应当比 16.39Mhz速度更快

只看该作者 · 2012-6-13 12:41

不好意思，测量方法不对，目前测量FSMC可以的RD时NE的速度为16.39MHZ，使用了如下的方法：
即减少while(test == 1)判断的开销！不知此方法是否还有误！

volatile static int test = 0;
volatile un ...
clingos 发表于 2011-12-16 15:50

0x68000000 放到一个变量里更好

只看该作者 · 2012-6-13 15:37

417极限读数据速度是168/3=54MHz

1万 · 2012-6-13 17:16

FSMC速度，可以分几个层次。
1个层次是，/READ、/WRITE低电平的时间，理想情况下可以达到 11.9ns （168M/2=84M），这接近于高速SRAM（10ns access）的速度。

另1个层次是，/READ、/WRITE高电平的时间，这取决于CPU发读、写指令的速度，代码怎么写以及编译器的优化都有影响。