今天搞了一下OLED.
原理图:
程序:
#include "hc32_ddl.h"
#include "oled.h"
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/* LED0 Port/Pin definition */
#define LED0_PORT (PortE)
#define LED0_PIN (Pin06)
/* LED1 Port/Pin definition */
#define LED1_PORT (PortA)
#define LED1_PIN (Pin07)
/* LED0~1 toggle definition */
#define LED0_TOGGLE() (PORT_Toggle(LED0_PORT, LED0_PIN))
#define LED1_TOGGLE() (PORT_Toggle(LED1_PORT, LED1_PIN))
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/**
******************************************************************************
** \brief Initialize the system clock for the sample
**
** \param None
**
** \retval None
******************************************************************************/
static void SysClkIni(void)
{
en_clk_sys_source_t enSysClkSrc;
stc_clk_sysclk_cfg_t stcSysClkCfg;
stc_clk_xtal_cfg_t stcXtalCfg;
stc_clk_mpll_cfg_t stcMpllCfg;
MEM_ZERO_STRUCT(enSysClkSrc);
MEM_ZERO_STRUCT(stcSysClkCfg);
MEM_ZERO_STRUCT(stcXtalCfg);
MEM_ZERO_STRUCT(stcMpllCfg);
/* Set bus clk div. */
stcSysClkCfg.enHclkDiv = ClkSysclkDiv1; // Max 168MHz
stcSysClkCfg.enExclkDiv = ClkSysclkDiv2; // Max 84MHz
stcSysClkCfg.enPclk0Div = ClkSysclkDiv1; // Max 168MHz
stcSysClkCfg.enPclk1Div = ClkSysclkDiv2; // Max 84MHz
stcSysClkCfg.enPclk2Div = ClkSysclkDiv4; // Max 60MHz
stcSysClkCfg.enPclk3Div = ClkSysclkDiv4; // Max 42MHz
stcSysClkCfg.enPclk4Div = ClkSysclkDiv2; // Max 84MHz
CLK_SysClkConfig(&stcSysClkCfg);
/* Switch system clock source to MPLL. */
/* Use Xtal32 as MPLL source. */
stcXtalCfg.enMode = ClkXtalModeOsc;
stcXtalCfg.enDrv = ClkXtalLowDrv;
stcXtalCfg.enFastStartup = Enable;
CLK_XtalConfig(&stcXtalCfg);
CLK_XtalCmd(Enable);
/* MPLL config. */
stcMpllCfg.pllmDiv = 1u;
stcMpllCfg.plln =50u;
stcMpllCfg.PllpDiv = 4u;
stcMpllCfg.PllqDiv = 4u;
stcMpllCfg.PllrDiv = 4u;
CLK_SetPllSource(ClkPllSrcXTAL);
CLK_MpllConfig(&stcMpllCfg);
/* flash read wait cycle setting */
EFM_Unlock();
EFM_SetLatency(EFM_LATENCY_5);
EFM_Lock();
/* Enable MPLL. */
CLK_MpllCmd(Enable);
/* Wait MPLL ready. */
while(Set != CLK_GetFlagStatus(ClkFlagMPLLRdy))
{
;
}
/* Switch system clock source to MPLL. */
CLK_SetSysClkSource(CLKSysSrcMPLL);
}
/**
*******************************************************************************
** \brief Main function of template project
**
** \param None
**
** \retval int32_t return value, if needed
**
******************************************************************************/
int32_t main(void)
{
uint32_t i;
stc_port_init_t stcPortInit;
/* Initialize system clock*/
SysClkIni();
/*initiallize LED port*/
MEM_ZERO_STRUCT(stcPortInit);
stcPortInit.enPinMode = Pin_Mode_Out;
stcPortInit.enExInt = Enable;
stcPortInit.enPullUp = Enable;
/* LED0 Port/Pin initialization */
PORT_Init(LED0_PORT, LED0_PIN, &stcPortInit);
/* LED1 Port/Pin initialization */
PORT_Init(LED1_PORT, LED1_PIN, &stcPortInit);
OLED_Init();
OLED_Clear();
OLED_ShowString(10,1,"I Love You!");// OLED TEST
/* I2C master polling comunication successed */
while(1)
{
LED1_TOGGLE();
Ddl_Delay1ms(500ul);
}
}
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/
效果图:
工程:
OLED.rar
(812.44 KB)
|