/**************************************************************************//**
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V3.00
* $Revision: 2 $
* $Date: 16/10/25 4:29p $
* [url=home.php?mod=space&uid=247401]@brief[/url] Show the usage of GPIO interrupt function.
* @note
* Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
******************************************************************************/
#include <stdio.h>
#include "NUC029xGE.h"
#define PLLCTL_SETTING CLK_PLLCTL_72MHz_HXT
#define PLL_CLOCK 72000000
/**
* @brief PortA/PortB IRQ
*
* @param None
*
* [url=home.php?mod=space&uid=266161]@return[/url] None
*
* [url=home.php?mod=space&uid=1543424]@Details[/url] The PortA/PortB default IRQ, declared in startup_NUC029xGE.s.
*/
void GPAB_IRQHandler(void)
{
/* To check if PB.3 interrupt occurred */
if(GPIO_GET_INT_FLAG(PB, BIT3))
{
GPIO_CLR_INT_FLAG(PB, BIT3);
printf("PB.3 INT occurred.\n");
}
else
{
/* Un-expected interrupt. Just clear all PORTA, PORTB interrupts */
PA->INTSRC = PA->INTSRC;
PB->INTSRC = PB->INTSRC;
printf("Un-expected interrupts.\n");
}
}
/**
* @brief PortC/PortD/PortE/PortF IRQ
*
* @param None
*
* @return None
*
* @details The PortC/PortD/PortE/PortF default IRQ, declared in startup_NUC029xGE.s.
*/
void GPCDEF_IRQHandler(void)
{
/* To check if PC.4 interrupt occurred */
if(GPIO_GET_INT_FLAG(PC, BIT4))
{
GPIO_CLR_INT_FLAG(PC, BIT4);
printf("PC.4 INT occurred.\n");
}
else
{
/* Un-expected interrupt. Just clear all PORTC, PORTD, PORTE and PORTF interrupts */
PC->INTSRC = PC->INTSRC;
PD->INTSRC = PD->INTSRC;
PE->INTSRC = PE->INTSRC;
PF->INTSRC = PF->INTSRC;
printf("Un-expected interrupts.\n");
}
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable HIRC clock (Internal RC 22.1184MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Wait for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Select HCLK clock source as HIRC and HCLK source divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set multi-function pins for UART0 RXD and TXD */
SYS->GPA_MFPL &= ~(SYS_GPA_MFPL_PA2MFP_Msk | SYS_GPA_MFPL_PA3MFP_Msk);
SYS->GPA_MFPL |= (SYS_GPA_MFPL_PA3MFP_UART0_RXD | SYS_GPA_MFPL_PA2MFP_UART0_TXD);
}
void UART0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
/* Reset UART0 */
SYS_ResetModule(UART0_RST);
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
/*---------------------------------------------------------------------------------------------------------*/
/* MAIN function */
/*---------------------------------------------------------------------------------------------------------*/
int main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, peripheral clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART0 for printf */
UART0_Init();
printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %d Hz\n", SystemCoreClock);
printf("+------------------------------------------------+\n");
printf("| GPIO PB.3 and PC.4 Interrupt Sample Code |\n");
printf("+------------------------------------------------+\n\n");
/*-----------------------------------------------------------------------------------------------------*/
/* GPIO Interrupt Function Test */
/*-----------------------------------------------------------------------------------------------------*/
printf("PB.3 and PC.4 are used to test interrupt ......\n");
/* Configure PB.3 as Input mode and enable interrupt by rising edge trigger */
GPIO_SetMode(PB, BIT3, GPIO_MODE_INPUT);
GPIO_EnableInt(PB, 3, GPIO_INT_RISING);
NVIC_EnableIRQ(GPAB_IRQn);
/* Configure PC.4 as Quasi-bidirection mode and enable interrupt by falling edge trigger */
GPIO_SetMode(PC, BIT4, GPIO_MODE_QUASI);
GPIO_EnableInt(PC, 4, GPIO_INT_FALLING);
NVIC_EnableIRQ(GPCDEF_IRQn);
/* Enable interrupt de-bounce function and select de-bounce sampling cycle time is 1024 clocks of LIRC clock */
GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_1024);
GPIO_ENABLE_DEBOUNCE(PB, BIT3);
GPIO_ENABLE_DEBOUNCE(PC, BIT4);
/* Waiting for interrupts */
while(1);
}
/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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