RC0和RC1脚不能正常输出

1万 · 2021-1-18 20:51

pic18f26k80写程序的时候发现，我明明把RC0和RC1定义成输出，但是调试时却不能正常驱动

1万 · 2021-1-18 20:54

是因为这两个引脚有其他特殊功能吗

1万 · 2021-1-18 20:56

配置位信息看下

2万 · 2021-1-18 20:59

// CONFIG1L
#pragma config RETEN = OFF    // VREG Sleep Enable bit (Ultra low-power regulator is Disabled (Controlled by REGSLP bit))
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit (LF-INTOSC in High-power mode during Sleep)
#pragma config SOSCSEL = HIGH // SOSC Power Selection and mode Configuration bits (High Power SOSC circuit selected)
#pragma config XINST = OFF    // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config FOSC = INTIO2    // Oscillator (HS oscillator (Medium power, 4 MHz - 16 MHz))
#pragma config PLLCFG = ON    // PLL x4 Enable bit (Enabled)
#pragma config FCMEN = OFF    // Fail-Safe Clock Monitor (Disabled)
#pragma config IESO = OFF    // Internal External Oscillator Switch Over Mode (Disabled)

// CONFIG2L
#pragma config PWRTEN = OFF    // Power Up Timer (Disabled)
#pragma config BOREN = SBORDIS  // Brown Out Detect (Enabled in hardware, SBOREN disabled)
#pragma config BORV = 3       // Brown-out Reset Voltage bits (1.8V)
#pragma config BORPWR = ZPBORMV // BORMV Power level (ZPBORMV instead of BORMV is selected)

// CONFIG2H
#pragma config WDTEN = OFF    // Watchdog Timer (WDT controlled by SWDTEN bit setting)
#pragma config WDTPS = 1048576  // Watchdog Postscaler (1:1048576)

// CONFIG3H
#pragma config CANMX = PORTB // ECAN Mux bit (ECAN TX and RX pins are located on RB2 and RB3, respectively)
#pragma config MSSPMSK = MSK7 // MSSP address masking (7 Bit address masking mode)
#pragma config MCLRE = ON    // Master Clear Enable (MCLR Enabled, RE3 Disabled)

// CONFIG4L
#pragma config STVREN = ON    // Stack Overflow Reset (Enabled)
#pragma config BBSIZ = BB2K    // Boot Block Size (2K word Boot Block size)

// CONFIG5L
#pragma config CP0 = OFF       // Code Protect 00800-03FFF (Disabled)
#pragma config CP1 = OFF       // Code Protect 04000-07FFF (Disabled)
#pragma config CP2 = OFF       // Code Protect 08000-0BFFF (Disabled)
#pragma config CP3 = OFF       // Code Protect 0C000-0FFFF (Disabled)

// CONFIG5H
#pragma config CPB = OFF       // Code Protect Boot (Disabled)
#pragma config CPD = OFF       // Data EE Read Protect (Disabled)

// CONFIG6L
#pragma config WRT0 = OFF    // Table Write Protect 00800-03FFF (Disabled)
#pragma config WRT1 = OFF    // Table Write Protect 04000-07FFF (Disabled)
#pragma config WRT2 = OFF    // Table Write Protect 08000-0BFFF (Disabled)
#pragma config WRT3 = OFF    // Table Write Protect 0C000-0FFFF (Disabled)

// CONFIG6H
#pragma config WRTC = OFF    // Config. Write Protect (Disabled)
#pragma config WRTB = OFF    // Table Write Protect Boot (Disabled)
#pragma config WRTD = OFF    // Data EE Write Protect (Disabled)

// CONFIG7L
#pragma config EBTR0 = OFF    // Table Read Protect 00800-03FFF (Disabled)
#pragma config EBTR1 = OFF    // Table Read Protect 04000-07FFF (Disabled)
#pragma config EBTR2 = OFF    // Table Read Protect 08000-0BFFF (Disabled)
#pragma config EBTR3 = OFF    // Table Read Protect 0C000-0FFFF (Disabled)

// CONFIG7H
#pragma config EBTRB = OFF    // Table Read Protect Boot (Disabled)

2万 · 2021-1-18 21:02

对了，我也没法这两个端口设置为T1的时钟源，以下是我TMR1的配置信息：
T1CONbits.TMR1CS0 = 0;       //clock source is the system clock (FOSC/4)
  T1CONbits.T1CKPS0 = 0;
  T1CONbits.T1CKPS1 = 0;       //Prescale value = 00  1:1
  T1CONbits.RD16 = 1;          //16bit
  T1CONbits.TMR1ON = 0;       //不使能Timer1
  TMR1H = TMR1_Seted_H;
  TMR1L = TMR1_Seted;

原理图：
            //       PIC18F4580/4585/4680
            //       -----------------------------------
            // ----1|MCLR/Vpp/RE3    RX2/RB7/KBI3/PGD|28---
            // ----2|RA0/AN0/CVref    TX2/RB6/KBI2/PGC|27---
            // ----3|RA1/AN1          CCP5/RB5/KBI1/PGM|26---
            // ----4|RA2/AN2/Vref- ECCP1/RB4/KBI0/AN9|25---
            // ----5|RA3/AN3/Vref+          RB3/CANRX|24---
            // ----6|VCAP                         RB2/INT2/CANTX|23---
            // ----7|RA5/AN4/SS/hlvdin    RB1/INT1/AN8|22---
            // ----8|Vss                      RB0/INT0/FLT0/AN10|21---
            // ----9|OSC1/CLKI/RA7                                     Vdd|20---
            // ---10|OSC2/CLKOU/RA6                            Vss|19---
            // ---11|RC0/T1OSO/T13CK1       RC7/RX/DT|18---
            // ---12|RC1/T1OSI                RC6/TX/CK|17---
            // ---13|RC2/CCP1                   RC5/SDO|16---
            // ---14|RC3/SCK/SCL          RC4/SDI/SDA|15---
            //****************************************************//