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关于IEC60730的探讨:

IEC60730-1:2003《家用和类似用途电自动控制器第1部分:通用要求》新旧版本主要差异及说明

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沙发
powermaker2568|  楼主 | 2021-6-6 09:41 | 只看该作者
NUVOTON的DVD提供了一些关于 60730的标准例程。

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板凳
powermaker2568|  楼主 | 2021-6-6 09:42 | 只看该作者

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地板
powermaker2568|  楼主 | 2021-6-6 09:43 | 只看该作者
M051Series:

void SYS_Init(void)
{
    /* Unlock protected registers */
    SYS_UnlockReg();

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init System Clock                                                                                       */
    /*---------------------------------------------------------------------------------------------------------*/

    /* Enable external 12MHz XTAL */
    CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);

    /* Waiting for clock ready */
    CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);

    /* Switch HCLK clock source to HXT and HCLK source divide 1 */
    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV_HCLK(1));

    /* Select HXT as the clock source of UART0 */
    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));

    /* Enable IP clock */
    CLK_EnableModuleClock(UART0_MODULE);
    CLK_EnableModuleClock(SPI0_MODULE);
    CLK_EnableModuleClock(TMR0_MODULE);
    CLK_EnableModuleClock(TMR1_MODULE);
    CLK_EnableModuleClock(WDT_MODULE);
    CLK_EnableModuleClock(ADC_MODULE);

    /* ADC clock source is 12MHz, set divider to (40 + 1), ADC clock is 12/41 MHz */
    CLK->CLKDIV |= (41 << CLK_CLKDIV_ADC_N_Pos);

    /* Set PCLK/2048 as WDT clock and external crystal as UART clock source */
    CLK->CLKSEL1 = CLK_CLKSEL1_WDT_S_HCLK_DIV2048 | CLK_CLKSEL1_UART_S_HXT;

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init I/O Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Set P3 multi-function pins for UART0 RXD and TXD */
    SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;

    /* Lock protected registers */
    SYS_LockReg();

    /* Update System Core Clock */
    SystemCoreClockUpdate();
}

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5
powermaker2568|  楼主 | 2021-6-6 09:44 | 只看该作者
int32_t main()
{
    int32_t bResult;

    /* POST CPU Register Test */
    IEC60730_CPU_Reg_Test();
    if(!CPUTestPass) {
        while(1);
    }
   
    /* POST RAM Test */
    if(IEC60730_RAM_MarchX_Test(0x20000000, 600, NULL) == FAIL)
        while(1);

    /* Init System, IP clock and multi-function I/O */
    SYS_Init();

    /* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */
    UART_Open(UART0, 115200);

    printf("+-------------------------------------------------+\n");
    printf("|         Nuvoton MCU IEC60730 Test Suite         |\n");
    printf("+-------------------------------------------------+\n");

    /* CPU Registers Test */
    CPUTestPass = 0;
    printf("CPU Register Test (BIST)...");
    IEC60730_CPU_Reg_Test();
    if(CPUTestPass) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Program Counter Test */
    printf("Program Counter Test ...");
    bResult = IEC60730_CPU_PC_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    printf("RAM Test (MarchX, BIST)...");
    bResult = IEC60730_RAM_MarchX_Test(0x20000100, 0x300, NULL);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    printf("RAM Test (MarchC, BIST)...");
    bResult = IEC60730_RAM_MarchC_Test(0x20000100, 0x300, NULL);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Flash Test */
    printf("Flash Test ...");
    bResult = IEC60730_Flash_Test(0x200, 0x1000);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Interrupt Test */
    printf("Interrupt Test ...");
    bResult = IEC60730_Interrupt_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Clock Test */
    printf("Clock Test ...");
    bResult = IEC60730_Clock_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* AD Test */
    printf("AD Test ...");
    bResult = IEC60730_AD_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* I/O Test */
    printf("I/O Test ...");
    bResult = IEC60730_IO_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    while(1);
}

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6
powermaker2568|  楼主 | 2021-6-6 09:46 | 只看该作者
感觉好深奥。。。

有些标准,可能是对CPU内核来进行验证的吧?

真不知道还有这些知识点。

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7
powermaker2568|  楼主 | 2021-6-6 09:48 | 只看该作者
NUC400Series:

void SYS_Init(void)
{
    /* Unlock protected registers */
    SYS_UnlockReg();

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init System Clock                                                                                       */
    /*---------------------------------------------------------------------------------------------------------*/

    /* Enable HXT */
    CLK_EnableXtalRC(CLK_PWRCON_HXT_EN_Msk);

    /* Waiting for clock ready */
    CLK_WaitClockReady(CLK_CLKSTATUS_HXT_STB_Msk);

    /* Switch HCLK clock source to HXT and HCLK source divide 1 */
    CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV0_HCLK(1));

    /* Select HXT as the clock source of UART0 */
    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV0_UART(1));

    /* Enable IP clock */
    CLK_EnableModuleClock(UART0_MODULE);
    CLK_EnableModuleClock(SPI0_MODULE);
    CLK_EnableModuleClock(TMR0_MODULE);
    CLK_EnableModuleClock(TMR1_MODULE);
    CLK_EnableModuleClock(WDT_MODULE);
    CLK_EnableModuleClock(ADC_MODULE);

    /* Vref connect to AVDD */
    SYS->VREFCR |= SYS_VREFCR_ADC_VREFSEL_Msk;

    /* ADC clock source is 12MHz, set divider to (40 + 1), ADC clock is 12/41 MHz */
    CLK->CLKDIV0 |= (41 << CLK_CLKDIV0_ADC_N_Pos);

    /* Set PCLK/2048 as WDT clock and external crystal as UART clock source */
    CLK->CLKSEL1 = CLK_CLKSEL1_WDT_S_HCLK_DIV2048 | CLK_CLKSEL1_UART_S_HXT;

    /*---------------------------------------------------------------------------------------------------------*/
    /* Init I/O Multi-function                                                                                 */
    /*---------------------------------------------------------------------------------------------------------*/
    /* Set GPG multi-function pins for UART0 RXD and TXD */
    SYS->GPG_MFPL = SYS_GPG_MFPL_PG1_MFP_UART0_RXD | SYS_GPG_MFPL_PG2_MFP_UART0_TXD ;

    /* Lock protected registers */
    SYS_LockReg();

    /* Update System Core Clock */
    SystemCoreClockUpdate();
}

使用特权

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8
powermaker2568|  楼主 | 2021-6-6 09:49 | 只看该作者
int32_t main()
{
    int32_t bResult;

    /* POST CPU Register Test */
    IEC60730_CPU_Reg_Test();
    if(!CPUTestPass) {
        while(1);
    }

    /* POST RAM Test */
    if(IEC60730_RAM_MarchX_Test(0x20000000, 600, NULL) == FAIL)
        while(1);

    /* Init System, IP clock and multi-function I/O */
    SYS_Init();

    /* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */
    UART_Open(UART0, 115200);

    printf("+-------------------------------------------------+\n");
    printf("|         Nuvoton MCU IEC60730 Test Suite         |\n");
    printf("+-------------------------------------------------+\n");

    /* CPU Registers Test */
    CPUTestPass = 0;
    printf("CPU Register Test (BIST)...");
    IEC60730_CPU_Reg_Test();
    if(CPUTestPass) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Program Counter Test */
    printf("Program Counter Test ...");
    bResult = IEC60730_CPU_PC_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    printf("RAM Test (MarchX, BIST)...");
    bResult = IEC60730_RAM_MarchX_Test(0x20000100, 0x300, NULL);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    printf("RAM Test (MarchC, BIST)...");
    bResult = IEC60730_RAM_MarchC_Test(0x20000100, 0x300, NULL);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Flash Test */
    printf("Flash Test ...");
    bResult = IEC60730_Flash_Test(0x000, 0x300);
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Interrupt Test */
    printf("Interrupt Test ...");
    bResult = IEC60730_Interrupt_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* Clock Test */
    printf("Clock Test ...");
    bResult = IEC60730_Clock_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* AD Test */
    printf("AD Test ...");
    bResult = IEC60730_AD_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    /* I/O Test */
    printf("I/O Test ...");
    bResult = IEC60730_IO_Test();
    if(bResult) printf("Pass !!\n");
    else printf("Fail !!\n");

    while(1);
}

使用特权

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9
powermaker2568|  楼主 | 2021-6-6 09:53 | 只看该作者
void GenerateCRCTable(void)
{
    uint32_t i, j;
    uint8_t u8CRCPoly = 0x89;  // the value of our CRC-7 polynomial

    // generate a table value for all 256 possible byte values
    for (i = 0; i < 256; i++) {
        aCRCTable[i] = (i & 0x80) ? i ^ u8CRCPoly : i;
        for (j = 1; j < 8; j++) {
            aCRCTable[i] <<= 1;
            if (aCRCTable[i] & 0x80)
                aCRCTable[i] ^= u8CRCPoly;
        }
    }
}

// adds a message byte to the current CRC-7 to get a the new CRC-7
uint8_t CRCAdd(uint8_t u8CRC, uint8_t u8MessageByte)
{
    return aCRCTable[(u8CRC << 1) ^ u8MessageByte];
}

// returns the CRC-7 for a message of "length" bytes
uint8_t getCRC(uint8_t *u8pMessage, uint32_t u32Length)
{
    uint32_t i;
    uint8_t u8CRC = 0;

    for (i = 0; i < u32Length; i++)
        u8CRC = CRCAdd(u8CRC, u8pMessage[i]);
    return u8CRC;
}

uint8_t IEC60730_Flash_Test(uint32_t u32StartAddr, uint32_t u32Length)
{
    uint8_t volatile u8CRC;
    uint8_t *u8pPtr = (uint8_t *)u32StartAddr;

    /* For the first time, the CRC value need to be remembered */
    GenerateCRCTable();
    u8CRC = getCRC(u8pPtr, u32Length);

    // compare the CRC value
    if(u8CRC != KNOWN_CRC)
        return FAIL;
    else
        return PASS;
}

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10
powermaker2568|  楼主 | 2021-6-6 09:53 | 只看该作者
感觉太深奥了。。。

有机会了移植一下,体验一下是什么原理。。。

感觉像是CPU内核、内存、外设等稳定性的测试吧

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