APP1源码：
/**************************************************************************//**
* @file main.c
* @version V1.00
* @brief AP1 Base address is 0, AP2 Base address is 0x4000
* LD Base address is 0x100000
* Multiple app jump to each other
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
****************************************************************************/
#include <stdio.h>
#include "NuMicro.h"
/*----------------------------------------------------------------------------*/
/* Define */
/*----------------------------------------------------------------------------*/
#define AP1_BASE_ADDRESS 0
#define AP2_BASE_ADDRESS 0x4000
#define LD_BASE_ADDRESS 0x100000
/*----------------------------------------------------------------------------*/
/* Global variable */
/*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/* Functions */
/*----------------------------------------------------------------------------*/
void SYS_Init(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Enable HIRC */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Waiting for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Switch HCLK clock source to HIRC */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Set both PCLK0 and PCLK1 as HCLK/2 */
CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV2 | CLK_PCLKDIV_APB1DIV_DIV2);
/* Switch UART0 clock source to HIRC */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HIRC, CLK_CLKDIV0_UART0(1));
/* Enable UART peripheral clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate PllClock, SystemCoreClock and CycylesPerUs automatically. */
SystemCoreClockUpdate();
/*----------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*----------------------------------------------------------------------*/
/* Set GPB multi-function pins for UART0 RXD and TXD */
SYS->GPB_MFPH = (SYS->GPB_MFPH & ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk)) |
(SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
/* Lock protected registers */
SYS_LockReg();
}
/*----------------------------------------------------------------------*/
/* Init UART0 */
/*----------------------------------------------------------------------*/
void UART0_Init(void)
{
/* Reset UART0 */
SYS_ResetModule(UART0_RST);
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
int main(void)
{
uint8_t u8Item;
/* Init System, IP clock and multi-function I/O. */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
printf("\n\n\n");
printf("\nAPROM AP1 START, Boot Address = 0x0 \n");
do
{
printf("+----------------------------------------+\n");
printf("| Select |\n");
printf("+----------------------------------------+\n");
printf("| [0] Run LDROM program(Address=0x100000) \n");
printf("| [1] Run APROM2 program(Address=0x4000) \n");
printf("+----------------------------------------+\n");
printf("Please select...\n");
u8Item = getchar();
switch (u8Item)
{
case '0':
SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
/*Disable all interrupts*/
NVIC->ICER[0] = 0xFFFFFFFF;
FMC_SetVectorPageAddr(LD_BASE_ADDRESS);
/* Reset CPU only to reset to new vector page */
// SYS_ResetCPU();
/* Reset System to reset to new vector page. */
NVIC_SystemReset();
break;
case '1':
SYS_UnlockReg();
/* Enable FMC ISP function */
FMC_Open();
/*Disable all interrupts*/
NVIC->ICER[0] = 0xFFFFFFFF;
FMC_SetVectorPageAddr(AP2_BASE_ADDRESS);
/* Reset CPU only to reset to new vector page */
// SYS_ResetCPU();
/* Reset System to reset to new vector page. */
NVIC_SystemReset();
break;
}
} while (1);
}
/*** (C) COPYRIGHT 2021 Nuvoton Technology Corp. ***/
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