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HDMI TO MIPI 联系凌S 13828849458

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ly13828849458|  楼主 | 2022-4-24 21:40 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
AN, vi, ic, ip, DM, ce, hd
HDMI TO MIPI  联系凌S 13828849458
CMOS Digital Integrated Circuit Silicon Monolithic
TC358743XBG
Mobile Peripheral Devices
Overview
The HDMI®-RX to MIPI® CSI-2-TX is a bridge device that converts HDMI
stream to MIPI CSI-2 TX.
The current and next generation Application Processors and Baseband chips
have been designed without video streaming input port except CSI-2 for
Camcorder input. Smart Phone Processors are being used in several
applications that required Video Input
TC358743XBG takes in HDMI input and converts to CSI-2 that looks like a Camcorder input.
Features
● HDMI-RX Interface
 HDMI 1.4
- Video Formats Support (Up to 1080P @60fps)
 RGB, YCbCr444: 24-bpp @60fps
 YCbCr422 24-bpp @60fps
- Audio Supports
 Internal Audio PLL to track N/CTS value
transmitted by the ACR packet.
- 3D Support
- Support HDCP
- DDC Support
- EDID Support
 Release A, Revision 1 (Feb 9, 2000)
 First 128 byte (EDID 1.3 structure)
 First E-EDID Extension: 128 bytes of CEA
Extension version 3 (specified in CEA-861-D)
 Embedded 1K-byte SRAM (EDID_SRAM)
- Maximum HDMI clock speed: 165MHz
 Does not support Audio Return Path and HDMI
Ethernet Channels
● CSI-2 TX Interface
 MIPI CSI-2 compliant (Version 1.01 Revision
0.04 – 2 April 2009)
 Supports up to 1 Gbps per data lane
- Video, Audio and InfoFrame data can be transmit
over MIPI CSI-2
 Supports up to 4 data lanes
● I2C Slave Interface
 Support for Normal-mode (100 kHz) and
Fast-mode (400 kHz)
 Support Ultra Fast-mode (2 MHz)
 Configure all TC358743XBG internal registers
● Audio Output Interface
Either I2S or TDM Audio interface available (pins
are multiplexed)
I2S Audio Interface
 Single data lane for stereo data
 Support Master Clock mode only
 Support 16, 18, 20 or 24-bit data (depend on
HDMI input stream)
 Support Left or Right-justify with MSB first
 Support 32 bit-wide time-slot only
 Output Audio Oversampling clock (256fs)
TDM (Time Division Multiplexed) Audio Interface
 Fixed to 8 channels (depend on HDMI input
stream)
 Support 32 bit-wide time slot only
 Support Master Clock mode only
 Support 16, 18, 20 or 24-bit PCM audio data
word (depend on HDMI input stream)
 Output Audio Oversampling clock (256fs)
● InfraRed (IR)
 Support NEC Infrared protocol.
● System
 Internal core has two power domains (VDDC1
and VDDC2)
- VDDC1 is always on power domain
- VDDC2 can be shut-off during deep sleep mode
● Power supply inputs
 Core and MIPI D-PHY: 1.2V
 I/O: 1.8V – 3.3V
 HDMI: 3.3V
 APLL: 3.3V/2.5V
● Power Consumption during typical operations
 720P: 0.48 W
 1080P @30fps: 0.48 W
 1080P @60fps: 0.54 W

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