/**
* @brief RTC configuration.
* @param None
* @retval None
*/
void RTC_Init_Config(void)
{
#ifndef _RUN_WIN_PC
stc_rtc_init_t stcRtcInit = {0};
if(DISABLE == RTC_GetCounterState()){
/* Reset RTC counter */
if (LL_ERR_TIMEOUT == RTC_DeInit()) {
DDL_Printf("Reset RTC failed!\r\n");
} else{
/* Configure structure initialization */
(void)RTC_StructInit(&stcRtcInit);
/* Configuration RTC structure */
stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
stcRtcInit.u8HourFormat = RTC_HOUR_FMT_24H;
stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_SEC;
(void)RTC_Init(&stcRtcInit);
/* Update date and time */
RTC_CalendarConfig();
/* RTC period and alarm interrupt configure */
// (void)INTC_ShareIrqCmd(INT_SRC_RTC_ALM, ENABLE);
(void)INTC_ShareIrqCmd(INT_SRC_RTC_PRD, ENABLE);
/* Clear pending */
NVIC_ClearPendingIRQ(INT131_IRQn);
/* Set priority */
NVIC_SetPriority(INT131_IRQn, DDL_IRQ_PRIO_DEFAULT);
/* Enable NVIC */
NVIC_EnableIRQ(INT131_IRQn);
/* Enable period and alarm interrupt */
// RTC_IntCmd((RTC_INT_PERIOD | RTC_INT_ALARM), ENABLE);
RTC_IntCmd((RTC_INT_PERIOD), ENABLE);
/* Startup RTC count */
RTC_Cmd(ENABLE);
}
}
#endif
}
/**
* @brief BSP clock initialize.
* SET board system clock to PLLH@240MHz
* Flash: 5 wait
* SRAM_HS: 1 wait
* SRAM1_2_3_4_B: 2 wait
* PCLK0: 240MHz
* PCLK1: 120MHz
* PCLK2: 60MHz
* PCLK3: 60MHz
* PCLK4: 120MHz
* EXCLK: 120MHz
* HCLK: 240MHz
* @param None
* @retval None
*/
void BSP_CLK_Init(void)
{
stc_clock_xtal_init_t stcXtalInit;
stc_clock_pll_init_t stcPLLHInit;
/* PCLK0, HCLK Max 240MHz */
/* PCLK1, PCLK4 Max 120MHz */
/* PCLK2, PCLK3 Max 60MHz */
/* EX BUS Max 120MHz */
CLK_SetClockDiv(CLK_BUS_CLK_ALL, \
(CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | \
CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | \
CLK_HCLK_DIV1));
(void)CLK_XtalStructInit(&stcXtalInit);
/* Config Xtal and enable Xtal */
stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
stcXtalInit.u8State = CLK_XTAL_ON;
stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
(void)CLK_XtalInit(&stcXtalInit);
(void)CLK_PLLStructInit(&stcPLLHInit);
/* VCO = (8/1)*120 = 960MHz*/
/* MPLL config (XTAL / pllmDiv * plln / PllpDiv = 240M). */
stcPLLHInit.u8PLLState = CLK_PLL_ON;
stcPLLHInit.PLLCFGR = 0UL;
stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
stcPLLHInit.PLLCFGR_f.PLLN = 120UL - 1UL;
stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
(void)CLK_PLLInit(&stcPLLHInit);
/* Highspeed SRAM set to 0 Read/Write wait cycle */
SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
/* SRAM1_2_3_4_backup set to 1 Read/Write wait cycle */
SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
/* 0-wait @ 40MHz */
(void)EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
/* 4 cycles for 200 ~ 250MHz */
GPIO_SetReadWaitCycle(GPIO_RD_WAIT4);
CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
}
/**
* @brief Main函数
* @param None
* @retval
*/
int32_t main(void)
{
stc_rtc_date_t date;
stc_rtc_time_t time;
uint8_t data_time[100] = {0};
/* Add your code here */
LL_PERIPH_WE(LL_PERIPH_ALL);
BSP_CLK_Init();
LL_PrintfInit(PRINTF_UART,PRINTF_UART_BAUDRATE,BSP_PRINTF_Preinit);
printf("init start...\n");
PWC_VBAT_Reset();
RTC_Init_Config();
/*看门狗初始化*/
Wdt_Init();
IWDG_Feed();
user_led_init();
LL_PERIPH_WP((LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM));
while(1)
{
RTC_GetDate(RTC_DATA_FMT_DEC,&date);
RTC_GetTime(RTC_DATA_FMT_DEC,&time);
//定时器计数1s执行打印rtc时间
if(IsSecondOver(APP_RUN_SOT,APP_RUN_UPDATE_PERIOD)){
sprintf((char*)data_time,"SystemTime=20%02d%02d%02d%02d%02d%02d",
date.u8Year,
date.u8Month,
date.u8Day,
time.u8Hour,
time.u8Minute,
time.u8Second);
printf("%s\r\n",data_time);
}
IWDG_Feed();
}
}
#endif
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