用的新唐m483芯片,想对700k左右的信号通过pwm触发进行eadc采样通过pdma输出,后续用来做带通滤波和傅里叶变化。
求大佬指点,adc的采样率部分如何设置才能满足700k信号采集的需要,看到官方文档中提到最高采样率可以达到5.14M,。
#include <stdio.h>
#include "NuMicro.h"
#include "arm_math.h"
#define PLL_CLOCK 192000000
#define ADC_SAMPLE_RATE 6
#define SAMPLE_NUM 512
#define NUM_ADC_CHANNELS 1
#define PDMA_CH 2
int16_t adcValues[SAMPLE_NUM] = {0};
float32_t fft_out[SAMPLE_NUM];
uint32_t ifft_flag = 0;
uint32_t i;
float32_t DSPCalTime;
uint32_t g_u32SampleModuleNum = 0;
float32_t output[SAMPLE_NUM];
float32_t temp_output[SAMPLE_NUM];
float32_t amplitudes[SAMPLE_NUM/2];
float32_t frequencies[SAMPLE_NUM/2];
volatile uint32_t AdcInput;
float32_t AdcInput_float;
uint32_t status;
float32_t *inputF32, *outputF32;
float32_t firStateF32[SAMPLE_NUM+5];
arm_rfft_fast_instance_f32 S;
arm_fir_instance_f32 iir_inst;
volatile uint32_t g_u32AdcIntFlag;
volatile uint32_t g_u32AdcIntFlag, g_u32COVNUMFlag = 0;
volatile uint32_t g_u32IsTestOver = 0;
void SYS_Init(void)
{
PF->MODE &= ~(GPIO_MODE_MODE2_Msk | GPIO_MODE_MODE3_Msk);
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
CLK_SetCoreClock(PLL_CLOCK);
CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV2 | CLK_PCLKDIV_APB1DIV_DIV2);
CLK_EnableModuleClock(UART0_MODULE);
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
CLK_EnableModuleClock(EPWM0_MODULE);
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0);
CLK_EnableModuleClock(EADC_MODULE);
CLK_SetModuleClock(EADC_MODULE, 0, CLK_CLKDIV0_EADC(8));
CLK_EnableModuleClock(PDMA_MODULE);
SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);
SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
PB->MODE &= ~(GPIO_MODE_MODE6_Msk | GPIO_MODE_MODE7_Msk);
SYS->GPB_MFPL &= ~(SYS_GPB_MFPL_PB6MFP_Msk | SYS_GPB_MFPL_PB7MFP_Msk);
SYS->GPB_MFPL |= (SYS_GPB_MFPL_PB6MFP_EADC0_CH6 | SYS_GPB_MFPL_PB7MFP_EADC0_CH7);
GPIO_DISABLE_DIGITAL_PATH(PB, BIT7|BIT6);
SYS->GPB_MFPL = (SYS->GPB_MFPL & (~SYS_GPB_MFPL_PB5MFP_Msk));
SYS->GPB_MFPL |= SYS_GPB_MFPL_PB5MFP_EPWM0_CH0;
}
void UART0_Init()
{
UART_Open(UART0, 115200);
}
void EPWM0_Init()
{
uint16_t TimeBASE=1000;
EPWM_ConfigOutputChannel(EPWM0, 0, TimeBASE, 50);
EPWM_Start(EPWM0, EPWM_CH_0_MASK);
EPWM_EnableADCTrigger(EPWM0,0,EPWM_TRG_ADC_EVEN_COMPARE_DOWN);
EPWM_SET_OUTPUT_LEVEL(EPWM0, BIT0, EPWM_OUTPUT_HIGH, EPWM_OUTPUT_LOW, EPWM_OUTPUT_NOTHING, EPWM_OUTPUT_NOTHING);
EPWM_EnableOutput(EPWM0, BIT0);
}
void PDMA_Init()
{
PDMA_Open(PDMA,BIT2);
PDMA_SetTransferCnt(PDMA,PDMA_CH, PDMA_WIDTH_16, SAMPLE_NUM);
PDMA_SetTransferAddr(PDMA,PDMA_CH, (uint32_t)&EADC->DAT[g_u32SampleModuleNum], PDMA_SAR_FIX, (uint32_t)adcValues, PDMA_DAR_INC);
PDMA_SetTransferMode(PDMA,PDMA_CH, PDMA_EADC0_RX, FALSE, 0);
PDMA_SetBurstType(PDMA,PDMA_CH, PDMA_REQ_SINGLE, PDMA_BURST_4);
PDMA_EnableInt(PDMA,PDMA_CH, PDMA_INT_TRANS_DONE);
NVIC_EnableIRQ(PDMA_IRQn);
}
void ReloadPDMA()
{
PDMA_SetTransferCnt(PDMA,PDMA_CH, PDMA_WIDTH_16, SAMPLE_NUM);
PDMA_SetTransferMode(PDMA,PDMA_CH, PDMA_EADC0_RX, FALSE, 0);
}
void PDMA_IRQHandler(void)
{
status = PDMA_GET_INT_STATUS(PDMA);
if(status & PDMA_INTSTS_ABTIF_Msk)
{
if(PDMA_GET_ABORT_STS(PDMA) & PDMA_ABTSTS_ABTIF2_Msk)
g_u32IsTestOver = 2;
PDMA_CLR_ABORT_FLAG(PDMA,PDMA_ABTSTS_ABTIF2_Msk);
}
else if(status & PDMA_INTSTS_TDIF_Msk)
{
if(PDMA_GET_TD_STS(PDMA) & PDMA_TDSTS_TDIF2_Msk)
g_u32IsTestOver = 1;
PDMA_CLR_TD_FLAG(PDMA,PDMA_TDSTS_TDIF2_Msk);
}
else
printf("unknown interrupt !!\n");
}
void GetAdcData()
{
EADC_Open(EADC, EADC_CTL_DIFFEN_SINGLE_END);
EADC_ConfigSampleModule(EADC, g_u32SampleModuleNum, EADC_EPWM0TG0_TRIGGER,2);
if (SYS->CSERVER & SYS_CSERVER_VERSION_Msk) /* M480LD */
EADC_ENABLE_SAMPLE_MODULE_PDMA(EADC, 1<<g_u32SampleModuleNum);
else /* M480 */
EADC_ENABLE_PDMA(EADC);
EPWM_Start(EPWM0, BIT0);
while(1)
{
while(g_u32IsTestOver == 0);
break;
}
g_u32IsTestOver = 0;
EPWM_ForceStop(EPWM0, BIT0);
for(g_u32COVNUMFlag = 0; (g_u32COVNUMFlag) < SAMPLE_NUM; g_u32COVNUMFlag++)
{
printf("%d\n", adcValues[g_u32COVNUMFlag]);
}
EADC_Close(EADC);
}
int32_t main(void)
{
SYS_UnlockReg();
SYS_Init();
SYS_LockReg();
UART0_Init();
EPWM0_Init();
PDMA_Init();
while(1)
{
ReloadPDMA();
GetAdcData();
};
CLK_DisableModuleClock(EADC_MODULE);
CLK_DisableModuleClock(EPWM0_MODULE);
CLK_DisableModuleClock(PDMA_MODULE);
NVIC_DisableIRQ(PDMA_IRQn);
} |
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