#申请原创# 这个帖子用于告诉大家如何基于ModusToolBox 开发PSoC62 WITH CAPSENSE EVALUATION KIT + CYW43012 adaptor
1. 下载安装IDE ModusToolBox from infineon web: https://www.infineon.com/cms/en/design-support/tools/sdk/modustoolbox-software/
2. 开发板: "PSoC 62 with CAPSENSE evaluation kit" 是infineon & RT-Thread联合推出的开发板，用于广大PSoC6兴趣爱好者学习与开发，其原理图可以在如下的链接获得： https://github.com/RT-Thread-Studio/sdk-bsp-cy8c624-infineon-evaluationkit/blob/main/documents/IFX-PSoC6-RT-Thread-sch.pdf
3. 开发板的配件 CYW43012 adaptor是基于AW-AM497模块的Wi-Fi & BT 开发板，其原理图如附件。
4. 这里我我们用ModusToolBox 3.1版本来开发，我们先在IDE里拉一个官方的例程：File-> New -> ModusToolBox application: PSoC6 BSPs: CY8CKIT-062S2-43012->BlueTooth LE Findme
Tips, 如果国内用户遇到在ModusToolBox下拉取不了示例代码的情况，可以使用ModusToolBox3.1的LCS（Local Content Storage）功能，参考如下的KBA：https://community.infineon.com/t5/Knowledge-Base-Articles/ModusToolbox-software-Offline-development-package-KBA236233/ta-p/373370
或者通过offline等方法；
5. 使用ModusToolBox的工具：BSP Assistant 1.10 修改 devices from CY8C624ABZI-S2D44 to CY8C624ALQI-S2D42
6. 使用 device configurator tool工具修改BSP的HW 映射
- Diable all the ioss[0].port[x] in device configurator
 - Disable thw WCO（因为该开发板没有WCO晶振）
 - Disable the SWD: Trace Mode -Serial and disable the :Signal "clock" on "debug" must not have connections when hidden. （demo code 默认把Trace mode - Serial 功能放在P6.4上，而这款开发板的P6.4/P6.5是默认的debug UART口）.
 - Disconnect the Clock on debug
- Un-Select the CSD in Peripherals/System
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- Set the Pins refer to PSoC 62 with CAPSENSE evaluation kit's SCH & CYW43012 Adaptor's SCH
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- Clear the warning in device configurator's Notice list, unselect the LCD & Power BT.
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- 保存Device configurator的配置
7. Replace the MURATA-1LV module's BT FW to AW-AM497:
- modify in Bluetooth_LE_Findme/bsps/TARGET_APP_CY8CKIT-062S2-43012/bsp.mk DEVICE_COMPONENTS:=43012 CAT1 CAT1A HCI-UART AW-AM497 PSoC6_02 #MURATA-1LV PSOC6_02
- Copy the attached COMPONENT_AW-AM497 into mtb_shared\btstack-integration\release-v4.3.1\COMPONENT_HCI-UART\firmware\COMPONENT_43012 or mtb_shared\btstack-integration\release-v4.6.0\COMPONENT_HCI-UART\firmware. The patch depend on the btstack version that your project used(build error code will give you such info or Library Manager tools have such info)
8. Build & Download. Notice: Please set the switch to 1.8v in PSoC62 WITH CAPSENSE EVALUATION KIT as CYW43012 use the 1.8v for Vddio.
9. Use the UART Terminal to check the log and Use the phone BLE tool like: AIROC™ Bluetooth® Connect App to search the Findme device and connect.
10. 在ModusToolBox下开发Wi-Fi的例程，其步骤跟蓝牙类似，BSP的修改可以参考本贴中的截图；其中CYW43012的nv_ram 如附件。修改的nv_ram的步骤：
a. Change the BSP.mk in project's bsps from DEVICE_COMPONENTS:=43012 CAT1 CAT1A HCI-UART MURATA-1LV PSOC6_02 to
DEVICE_COMPONENTS:=43012 CAT1 CAT1A HCI-UART AW-AM497 PSOC6_02#MURATA-1LV PSOC6_02
b. Add folder: COMPONENT_AW-AM497(can copy and rename COMPONENT_MURATA-1LV) into mtb_shared\wifi-host-driver\release-v2.6.1\WiFi_Host_Driver\resources\nvram\COMPONENT_43012
c. Change the COMPONENT_AW-AM497's wifi_nvram_image.h file: replace the nvram data with Azureware's AM497's nvram(附件的nvram)
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