有没有关于STM32H750在IAR环境下，将外部Flash程序搬到内部RAM中运行的文档说明

只看该作者 · 2024-2-1 10:37

由于STM32H750的RAM是分段不连续，我只能将外部Flash程序分开搬到RAM中运行。测试只搬一两个简单函数是没有问题。程序量大后就不正常，仿真查看程序内容发现MCU跳转的地址和实际地址对不上。例如MCU调用函数地址为0x30000000，实际函数的地址可能是0x30000001或者是其他地址。

下面是RAM拷贝的程序和ICF的配置

RCC->AHB2ENR |= 0xE0000000; // 使能SRAM1、SRAM2、SRAM3
#if 1
src  = (uint8_t *) __section_begin("USER_PRG1_RBLOCK");
dst  = (uint8_t *) __section_begin("USER_PRG1_WBLOCK");
size = (uint32_t) __section_size("USER_PRG1_WBLOCK");
bsp_copy_4byte(src, dst, size);
RAM_Fault_Cnt_DW(src, dst, size);
#endif

#if 1
src  = (uint8_t *) __section_begin("USER_PRG2_RBLOCK");
dst  = (uint8_t *) __section_begin("USER_PRG2_WBLOCK");
size = (uint32_t) __section_size("USER_PRG2_RBLOCK");
//if (0 != ((uint32_t)src&0x01))
{
//src += 1;
}

bsp_copy_4byte(src, dst, size);
RAM_Fault_Cnt_DW(src, dst, size);
#endif

#if 1
src  = (uint8_t *) __section_begin("USER_PRG3_RBLOCK");
dst  = (uint8_t *) __section_begin("USER_PRG3_WBLOCK");
size = (uint32_t) __section_size("USER_PRG3_WBLOCK");
bsp_copy_4byte(src, dst, size);
RAM_Fault_Cnt_DW(src, dst, size);
#endif

只看该作者 · 2024-2-1 10:37

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x90000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x90000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x90047FFF;

//define symbol __ICFEDIT_region_ROM1_start__ = 0x90018000;
//define symbol __ICFEDIT_region_ROM1_end__ = 0x90027FFF;
//define symbol __ICFEDIT_region_ROM2_start__ = 0x90028000;
//define symbol __ICFEDIT_region_ROM2_end__ = 0x90037FFF;
//define symbol __ICFEDIT_region_ROM3_start__ = 0x90038000;
//define symbol __ICFEDIT_region_ROM3_end__ = 0x90047FFF;

define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;

define symbol __ICFEDIT_region_CODERAM1_start__ = 0x24000000;
define symbol __ICFEDIT_region_CODERAM1_end__ = 0x2407FFFF;
define symbol __ICFEDIT_region_CODERAM2_start__ = 0x30000000;
define symbol __ICFEDIT_region_CODERAM2_end__ = 0x30047FFF;
define symbol __ICFEDIT_region_CODERAM3_start__ = 0x38000000;
define symbol __ICFEDIT_region_CODERAM3_end__ = 0x3800FFFF;

define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x4000;
define symbol __ICFEDIT_size_heap__ = 0x2000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region    = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
//define region CODEROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
//define region CODEROM2_region = mem:[from __ICFEDIT_region_ROM2_start__ to __ICFEDIT_region_ROM2_end__];
//define region CODEROM3_region = mem:[from __ICFEDIT_region_ROM3_start__ to __ICFEDIT_region_ROM3_end__];
define region RAM_region    = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CODERAM1_region = mem:[from __ICFEDIT_region_CODERAM1_start__ to __ICFEDIT_region_CODERAM1_end__];
define region CODERAM2_region = mem:[from __ICFEDIT_region_CODERAM2_start__ to __ICFEDIT_region_CODERAM2_end__];
define region CODERAM3_region = mem:[from __ICFEDIT_region_CODERAM3_start__ to __ICFEDIT_region_CODERAM3_end__];
define region ITCMRAM_region  = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP    with alignment = 8, size = __ICFEDIT_size_heap__    { };

initialize by copy { readwrite,};

do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

//--------------------------------------------------
initialize by copy
{
ro code object stm32h7xx_hal_gpio.o,
};

initialize by copy
{
ro code object delay.o,
};

initialize by copy
{
ro code object beep.o,
//section RAMCODE,
};

//-----------------512K AXISRAM-------------------
define block USER_PRG1_RBLOCK
{
ro code object delay.o,
//ro code object stm32h7xx_hal_gpio.o,
};
define block USER_PRG1_WBLOCK
{
rw code object delay.o,
//rw code object stm32h7xx_hal_gpio.o,
};

//-----------------288K SRAM1 SRAM2 SRAM3----------
define block USER_PRG2_RBLOCK
{
ro code object beep.o,
};
define block USER_PRG2_WBLOCK
{
rw code object beep.o,
};

//-----------------64K SRAM4------------------------
define block USER_PRG3_RBLOCK
{
ro code object stm32h7xx_hal_gpio.o,
};
define block USER_PRG3_WBLOCK
{
rw code object stm32h7xx_hal_gpio.o,
};

//--------------------------------------------------
place in ROM_region { readonly };
place in ROM_region { block USER_PRG1_RBLOCK, };
place in ROM_region { block USER_PRG2_RBLOCK, };
place in ROM_region { block USER_PRG3_RBLOCK, };

place in RAM_region { readwrite, block CSTACK, block HEAP,};
place in CODERAM1_region  { block USER_PRG1_WBLOCK, };
place in CODERAM2_region  { block USER_PRG2_WBLOCK, };
//place in CODERAM2_region  {section RAMCODE, };
place in CODERAM3_region  { block USER_PRG3_WBLOCK, };