【GD32 MCU入门教程】四、GD32 MCU 常见外设介绍（15）CAN 模块介绍

void can_config(void)

{

#if defined (GD32F30X_CL) ||(GD32F4XX) ||(GD32F20X_CL)||(GD32F10X_HD)

 can_parameter_struct can_parameter;

 can_filter_parameter_struct can_filter_parameter;



 can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);

 can_struct_para_init(CAN_FILTER_STRUCT, &can_filter_parameter);

 /* initialize CAN register */

 can_deinit(CAN0);

 /* initialize CAN parameters */

 can_parameter.time_triggered = DISABLE;

 can_parameter.auto_bus_off_recovery = DISABLE;

 can_parameter.auto_wake_up = DISABLE;

 can_parameter.no_auto_retrans = DISABLE;

 can_parameter.rec_fifo_overwrite = DISABLE;

 can_parameter.trans_fifo_order = DISABLE;

 can_parameter.working_mode = CAN_NORMAL_MODE;

 can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;

 can_parameter.time_segment_1 = CAN_BT_BS1_5TQ;

 can_parameter.time_segment_2 = CAN_BT_BS2_4TQ;

 can_parameter.prescaler = 12;

 /* initialize CAN */

 can_init(CAN0, &can_parameter);



 /* initialize filter */ 

 can_filter_parameter.filter_number = 0;

 can_filter_parameter.filter_mode = CAN_FILTERMODE_MASK;

 can_filter_parameter.filter_bits = CAN_FILTERBITS_32BIT;

 can_filter_parameter.filter_list_high = 0x0000;

 can_filter_parameter.filter_list_low = 0x0000;

 can_filter_parameter.filter_mask_high = 0x0000;

can_filter_parameter.filter_mask_low = 0x0000;

 can_filter_parameter.filter_fifo_number = CAN_FIFO0;

 can_filter_parameter.filter_enable = ENABLE;



 can_filter_init(&can_filter_parameter);

 #if defined (CAN_RECEIVE) 

 #if defined (GD32F10X_HD)

 nvic_irq_enable(USBD_LP_CAN0_RX0_IRQn,0,0);

 #else

 nvic_irq_enable(CAN0_RX0_IRQn,0,0);

 #endif

 /* enable can receive FIFO0 not empty interrupt */

 can_interrupt_enable(CAN0, CAN_INT_RFNE0);

 #endif

#elif defined (GD32E10X)

 can_parameter_struct can_parameter;



 can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);

 /* initialize CAN register */

 can_deinit(CAN0);



 /* initialize CAN parameters */

 can_parameter.time_triggered = DISABLE;

 can_parameter.auto_bus_off_recovery = DISABLE;

 can_parameter.auto_wake_up = DISABLE;

 can_parameter.auto_retrans = DISABLE;

 can_parameter.rec_fifo_overwrite = DISABLE;

 can_parameter.trans_fifo_order = DISABLE;

 can_parameter.working_mode = CAN_NORMAL_MODE; 

 /* initialize CAN */

 can_init(CAN0, &can_parameter);



 /* config CAN0 baud rate */

 can_frequency_set(CAN0, DEV_CAN_BAUD_RATE);



 /* initialize filter */ 

 can_filter_mask_mode_init(DEV_CAN_ID, DEV_CAN_MASK, CAN_EXTENDED_FIFO0, 0);

 #if defined (CAN_RECEIVE) 

 /* configure CAN0 NVIC */

 nvic_irq_enable(CAN0_RX0_IRQn, 0, 0);

 /* enable can receive FIFO0 not empty interrupt */

 can_interrupt_enable(CAN0, CAN_INTEN_RFNEIE0);

 #endif

#elif defined (GD32F1X0)

 can_parameter_struct can_parameter;

can_filter_parameter_struct can_filter_parameter;

 /* initialize CAN register */

 can_deinit(CAN1);



 /* initialize CAN parameters */

 can_parameter.time_triggered = DISABLE;

 can_parameter.auto_bus_off_recovery = DISABLE;

can_parameter.auto_wake_up = DISABLE;

 can_parameter.no_auto_retrans = DISABLE;

 can_parameter.rec_fifo_overwrite = DISABLE;

 can_parameter.trans_fifo_order = DISABLE;

 can_parameter.working_mode = CAN_NORMAL_MODE;

 can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;

 can_parameter.time_segment_1 = CAN_BT_BS1_4TQ;

 can_parameter.time_segment_2 = CAN_BT_BS2_3TQ;

 can_parameter.prescaler = 18;

 /* initialize CAN */

 can_init(CAN1, &can_parameter);

 /* initialize filter */ 

 can_filter_parameter.filter_number = 15;

 can_filter_parameter.filter_mode = CAN_FILTERMODE_MASK;

 can_filter_parameter.filter_bits = CAN_FILTERBITS_32BIT;

 can_filter_parameter.filter_list_high = 0x0000;

 can_filter_parameter.filter_list_low = 0x0000;

 can_filter_parameter.filter_mask_high = 0x0000;

 can_filter_parameter.filter_mask_low = 0x0000; 

 can_filter_parameter.filter_fifo_number = CAN_FIFO0;

 can_filter_parameter.filter_enable = ENABLE;



 can_filter_init(&can_filter_parameter);



 #if defined (CAN_RECEIVE) 

 /* configure CAN1 NVIC */

 nvic_irq_enable(CAN1_RX0_IRQn,0,0);

can_interrupt_enable(CAN1, CAN_INTEN_RFNEIE0);

 #endif

#endif

}

void can_gpio_config(void)

{

#if defined (GD32F4XX)

 /* enable CAN0 clock */

 rcu_periph_clock_enable(RCU_CAN0);

 rcu_periph_clock_enable(RCU_GPIOB);

 /* configure CAN0 GPIO */

 gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_8);

 gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_8);

 gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_8);



 gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9);

 gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_9);

 gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_9);

#elif defined (GD32E10X) || (GD32F30X_CL) ||(GD32F10X_HD)

 /* enable CAN0 clock */

 rcu_periph_clock_enable(RCU_CAN0);

 rcu_periph_clock_enable(RCU_GPIOD);

 rcu_periph_clock_enable(RCU_AF); 

 /* configure CAN0 GPIO */

 gpio_init(GPIOD,GPIO_MODE_IPU,GPIO_OSPEED_50MHZ,GPIO_PIN_0);

 gpio_init(GPIOD,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_1);

 #if defined (GD32F10X_HD)

gpio_pin_remap_config(GPIO_CAN_FULL_REMAP,ENABLE);

 #else

 gpio_pin_remap_config(GPIO_CAN0_FULL_REMAP,ENABLE);

 #endif

#elif defined (GD32F20X_CL)

 /* enable CAN0 clock */

 rcu_periph_clock_enable(RCU_CAN0);

 rcu_periph_clock_enable(RCU_GPIOB);

 rcu_periph_clock_enable(RCU_AF);



 /* configure CAN0 GPIO */

 gpio_init(GPIOB,GPIO_MODE_IPU,GPIO_OSPEED_50MHZ,GPIO_PIN_8);

 gpio_init(GPIOB,GPIO_MODE_AF_PP,GPIO_OSPEED_50MHZ,GPIO_PIN_9);

 gpio_pin_remap_config(GPIO_CAN0_PARTIAL_REMAP,ENABLE);

#elif defined (GD32F1X0) //only GD32F170 and GD32F190 have CAN, GD32F130 and GD32F150 don't have

 /* enable CAN clock */

#if defined (CAN_RECEIVE)

rcu_periph_clock_enable(RCU_CAN0);

#endif

 rcu_periph_clock_enable(RCU_CAN1);

 rcu_periph_clock_enable(RCU_GPIOB);



 /* configure CAN1 GPIO */

 gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ,GPIO_PIN_12);

 gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_12);

 gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_12);



 gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ,GPIO_PIN_13);

 gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_13);

 gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_13);

#endif

}

int main(void)

{

#if defined (CAN_RECEIVE)

 can_receive_flag = RESET;

 LED2_init();

#endif

 /* GPIO config */

 can_gpio_config();

 /* CAN config */

can_config();

#if defined (CAN_TRANSMIT)

 /* initialize transmit message */

 #if defined (GD32E10X) || (GD32F30X_CL) || (GD32F10X_HD) || (GD32F4XX) || (GD32F20X_CL)

 can_struct_para_init(CAN_TX_MESSAGE_STRUCT, &g_transmit_message);

 #endif

 g_transmit_message.tx_sfid = 0x00;

 g_transmit_message.tx_efid = DEV_CAN_ID;

 g_transmit_message.tx_ft = CAN_FT_DATA;

 g_transmit_message.tx_ff = CAN_FF_EXTENDED;

 g_transmit_message.tx_dlen = 4;

 g_transmit_message.tx_data[0] = 0xaa;

 g_transmit_message.tx_data[1] = 0xbb;

 g_transmit_message.tx_data[2] = 0xcc;

 g_transmit_message.tx_data[3] = 0xdd;

#if defined (GD32E10X) || (GD32F30X_CL) || (GD32F10X_HD) || (GD32F4XX) || (GD32F20X_CL)

 can_message_transmit(CAN0, &g_transmit_message);

#elif defined (GD32F1X0)

can_message_transmit(CAN1, &g_transmit_message);

#endif

#endif

#if defined (CAN_RECEIVE)

 while(can_receive_flag == RESET);

if((g_receive_message.rx_data[0] == 0xaa) && (g_receive_message.rx_data[1] == 0xbb)&&\

(g_receive_message.rx_data[2] == 0xcc) && (g_receive_message.rx_data[3] == 0xdd))

{

 LED2_ON();

}

else

{

 LED2_OFF();

 }

#endif

 while(1);

}