测试spiflash存储器读写。
一、硬件部分
测试使用SPI1接口。
二、程序部分
2.1、配置SPI1
spi1初始化部分程序可以使用软件AT32_Work_Bench生成
2.2、spi-flash.c
/**
**************************************************************************
* [url=home.php?mod=space&uid=288409]@file[/url] spi_flash.c
* [url=home.php?mod=space&uid=247401]@brief[/url] spi_flash source code
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#include "spiflash/spi_flash.h"
/** @addtogroup AT32L021_periph_examples
* @{
*/
/** @addtogroup 021_SPI_w25q_flash
* @{
*/
uint8_t spiflash_sector_buf[SPIF_SECTOR_SIZE];
/**
* @brief spi configuration.
* @param none
* @retval none
*/
void spiflash_init(void)
{
gpio_init_type gpio_initstructure;
spi_init_type spi_init_struct;
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_DMA1_PERIPH_CLOCK, TRUE);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_0);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_0);
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_0);
/* software cs, pa15 as a general io to control flash cs */
gpio_initstructure.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_OUTPUT;
gpio_initstructure.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_initstructure.gpio_pins = GPIO_PINS_15;
gpio_init(GPIOA, &gpio_initstructure);
/* sck */
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_pins = GPIO_PINS_5;
gpio_init(GPIOA, &gpio_initstructure);
/* miso */
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_pins = GPIO_PINS_6;
gpio_init(GPIOA, &gpio_initstructure);
/* mosi */
gpio_initstructure.gpio_pull = GPIO_PULL_UP;
gpio_initstructure.gpio_mode = GPIO_MODE_MUX;
gpio_initstructure.gpio_pins = GPIO_PINS_7;
gpio_init(GPIOA, &gpio_initstructure);
FLASH_CS_HIGH();
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
spi_default_para_init(&spi_init_struct);
spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
spi_init(SPI1, &spi_init_struct);
spi_enable(SPI1, TRUE);
}
/**
* @brief write data to flash
* @param pbuffer: the pointer for data buffer
* @param write_addr: the address where the data is written
* @param length: buffer length
* @retval none
*/
void spiflash_write(uint8_t *pbuffer, uint32_t write_addr, uint32_t length)
{
uint32_t sector_pos;
uint16_t sector_offset;
uint16_t sector_remain;
uint16_t index;
uint8_t *spiflash_buf;
spiflash_buf = spiflash_sector_buf;
/* sector address */
sector_pos = write_addr / SPIF_SECTOR_SIZE;
/* address offset in a sector */
sector_offset = write_addr % SPIF_SECTOR_SIZE;
/* the remain in a sector */
sector_remain = SPIF_SECTOR_SIZE - sector_offset;
if(length <= sector_remain)
{
/* smaller than a sector size */
sector_remain = length;
}
while(1)
{
/* read a sector */
spiflash_read(spiflash_buf, sector_pos * SPIF_SECTOR_SIZE, SPIF_SECTOR_SIZE);
/* validate the read erea */
for(index = 0; index < sector_remain; index++)
{
if(spiflash_buf[sector_offset + index] != 0xFF)
{
/* there are some data not equal 0xff, so this secotr needs erased */
break;
}
}
if(index < sector_remain)
{
/* erase the sector */
spiflash_sector_erase(sector_pos);
/* copy the write data */
for(index = 0; index < sector_remain; index++)
{
spiflash_buf[index + sector_offset] = pbuffer[index];
}
spiflash_write_nocheck(spiflash_buf, sector_pos * SPIF_SECTOR_SIZE, SPIF_SECTOR_SIZE); /* program the sector */
}
else
{
/* write directly in the erased area */
spiflash_write_nocheck(pbuffer, write_addr, sector_remain);
}
if(length == sector_remain)
{
/* write end */
break;
}
else
{
/* go on writing */
sector_pos++;
sector_offset = 0;
pbuffer += sector_remain;
write_addr += sector_remain;
length -= sector_remain;
if(length > SPIF_SECTOR_SIZE)
{
/* could not write the remain data in the next sector */
sector_remain = SPIF_SECTOR_SIZE;
}
else
{
/* could write the remain data in the next sector */
sector_remain = length;
}
}
}
}
/**
* @brief read data from flash
* @param pbuffer: the pointer for data buffer
* @param read_addr: the address where the data is read
* @param length: buffer length
* @retval none
*/
void spiflash_read(uint8_t *pbuffer, uint32_t read_addr, uint32_t length)
{
FLASH_CS_LOW();
spi_byte_write(SPIF_READDATA); /* send instruction */
spi_byte_write((uint8_t)((read_addr) >> 16)); /* send 24-bit address */
spi_byte_write((uint8_t)((read_addr) >> 8));
spi_byte_write((uint8_t)read_addr);
spi_bytes_read(pbuffer, length);
FLASH_CS_HIGH();
}
/**
* @brief erase a sector data
* @param erase_addr: sector address to erase
* @retval none
*/
void spiflash_sector_erase(uint32_t erase_addr)
{
erase_addr *= SPIF_SECTOR_SIZE; /* translate sector address to byte address */
spiflash_write_enable();
spiflash_wait_busy();
FLASH_CS_LOW();
spi_byte_write(SPIF_SECTORERASE);
spi_byte_write((uint8_t)((erase_addr) >> 16));
spi_byte_write((uint8_t)((erase_addr) >> 8));
spi_byte_write((uint8_t)erase_addr);
FLASH_CS_HIGH();
spiflash_wait_busy();
}
/**
* @brief write data without check
* @param pbuffer: the pointer for data buffer
* @param write_addr: the address where the data is written
* @param length: buffer length
* @retval none
*/
void spiflash_write_nocheck(uint8_t *pbuffer, uint32_t write_addr, uint32_t length)
{
uint16_t page_remain;
/* remain bytes in a page */
page_remain = SPIF_PAGE_SIZE - write_addr % SPIF_PAGE_SIZE;
if(length <= page_remain)
{
/* smaller than a page size */
page_remain = length;
}
while(1)
{
spiflash_page_write(pbuffer, write_addr, page_remain);
if(length == page_remain)
{
/* all data are programmed */
break;
}
else
{
/* length > page_remain */
pbuffer += page_remain;
write_addr += page_remain;
/* the remain bytes to be prorammed */
length -= page_remain;
if(length > SPIF_PAGE_SIZE)
{
/* can be progrmmed a page at a time */
page_remain = SPIF_PAGE_SIZE;
}
else
{
/* smaller than a page size */
page_remain = length;
}
}
}
}
/**
* @brief write a page data
* @param pbuffer: the pointer for data buffer
* @param write_addr: the address where the data is written
* @param length: buffer length
* @retval none
*/
void spiflash_page_write(uint8_t *pbuffer, uint32_t write_addr, uint32_t length)
{
if((0 < length) && (length <= SPIF_PAGE_SIZE))
{
/* set write enable */
spiflash_write_enable();
FLASH_CS_LOW();
/* send instruction */
spi_byte_write(SPIF_PAGEPROGRAM);
/* send 24-bit address */
spi_byte_write((uint8_t)((write_addr) >> 16));
spi_byte_write((uint8_t)((write_addr) >> 8));
spi_byte_write((uint8_t)write_addr);
spi_bytes_write(pbuffer,length);
FLASH_CS_HIGH();
/* wait for program end */
spiflash_wait_busy();
}
}
/**
* @brief write data continuously
* @param pbuffer: the pointer for data buffer
* @param length: buffer length
* @retval none
*/
void spi_bytes_write(uint8_t *pbuffer, uint32_t length)
{
volatile uint8_t dummy_data;
#if defined(SPI_TRANS_DMA)
dma_init_type dma_init_struct;
dma_reset(DMA1_CHANNEL2);
dma_reset(DMA1_CHANNEL3);
dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI2_RX);
dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI2_TX);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = length;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)&dummy_data;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = FALSE;
dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL2, &dma_init_struct);
dma_init_struct.buffer_size = length;
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_base_addr = (uint32_t)pbuffer;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL3, &dma_init_struct);
spi_i2s_dma_transmitter_enable(SPI2, TRUE);
spi_i2s_dma_receiver_enable(SPI2, TRUE);
dma_channel_enable(DMA1_CHANNEL2, TRUE);
dma_channel_enable(DMA1_CHANNEL3, TRUE);
while(dma_flag_get(DMA1_FDT2_FLAG) == RESET);
dma_flag_clear(DMA1_FDT2_FLAG);
dma_channel_enable(DMA1_CHANNEL2, FALSE);
dma_channel_enable(DMA1_CHANNEL3, FALSE);
spi_i2s_dma_transmitter_enable(SPI2, FALSE);
spi_i2s_dma_receiver_enable(SPI2, FALSE);
#else
while(length--)
{
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
spi_i2s_data_transmit(SPI1, *pbuffer);
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
dummy_data = spi_i2s_data_receive(SPI1);
pbuffer++;
}
#endif
}
/**
* @brief read data continuously
* @param pbuffer: buffer to save data
* @param length: buffer length
* @retval none
*/
void spi_bytes_read(uint8_t *pbuffer, uint32_t length)
{
uint8_t write_value = FLASH_SPI_DUMMY_BYTE;
#if defined(SPI_TRANS_DMA)
dma_init_type dma_init_struct;
dma_reset(DMA1_CHANNEL2);
dma_reset(DMA1_CHANNEL3);
dma_flexible_config(DMA1, FLEX_CHANNEL2, DMA_FLEXIBLE_SPI2_RX);
dma_flexible_config(DMA1, FLEX_CHANNEL3, DMA_FLEXIBLE_SPI2_TX);
dma_default_para_init(&dma_init_struct);
dma_init_struct.buffer_size = length;
dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_base_addr = (uint32_t)&write_value;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = FALSE;
dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL3, &dma_init_struct);
dma_init_struct.buffer_size = length;
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_base_addr = (uint32_t)pbuffer;
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
dma_init_struct.memory_inc_enable = TRUE;
dma_init_struct.peripheral_base_addr = (uint32_t)(&SPI2->dt);
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
dma_init_struct.peripheral_inc_enable = FALSE;
dma_init_struct.priority = DMA_PRIORITY_VERY_HIGH;
dma_init_struct.loop_mode_enable = FALSE;
dma_init(DMA1_CHANNEL2, &dma_init_struct);
spi_i2s_dma_transmitter_enable(SPI2, TRUE);
spi_i2s_dma_receiver_enable(SPI2, TRUE);
dma_channel_enable(DMA1_CHANNEL2, TRUE);
dma_channel_enable(DMA1_CHANNEL3, TRUE);
while(dma_flag_get(DMA1_FDT2_FLAG) == RESET);
dma_flag_clear(DMA1_FDT2_FLAG);
dma_channel_enable(DMA1_CHANNEL2, FALSE);
dma_channel_enable(DMA1_CHANNEL3, FALSE);
spi_i2s_dma_transmitter_enable(SPI2, FALSE);
spi_i2s_dma_receiver_enable(SPI2, FALSE);
#else
while(length--)
{
while(spi_i2s_flag_get(SPI1, SPI_I2S_TDBE_FLAG) == RESET);
spi_i2s_data_transmit(SPI1, write_value);
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
*pbuffer = spi_i2s_data_receive(SPI1);
pbuffer++;
}
#endif
}
/**
* @brief wait program done
* @param none
* @retval none
*/
void spiflash_wait_busy(void)
{
while((spiflash_read_sr1() & 0x01) == 0x01);
}
/**
* @brief read sr1 register
* @param none
* @retval none
*/
uint8_t spiflash_read_sr1(void)
{
uint8_t breadbyte = 0;
FLASH_CS_LOW();
spi_byte_write(SPIF_READSTATUSREG1);
breadbyte = (uint8_t)spi_byte_read();
FLASH_CS_HIGH();
return (breadbyte);
}
/**
* @brief enable write operation
* @param none
* @retval none
*/
void spiflash_write_enable(void)
{
FLASH_CS_LOW();
spi_byte_write(SPIF_WRITEENABLE);
FLASH_CS_HIGH();
}
/**
* @brief read device id
* @param none
* @retval device id
*/
uint16_t spiflash_read_id(void)
{
uint16_t wreceivedata = 0;
FLASH_CS_LOW();
spi_byte_write(SPIF_MANUFACTDEVICEID);
spi_byte_write(0x00);
spi_byte_write(0x00);
spi_byte_write(0x00);
wreceivedata |= spi_byte_read() << 8;
wreceivedata |= spi_byte_read();
FLASH_CS_HIGH();
return wreceivedata;
}
/**
* @brief write a byte to flash
* @param data: data to write
* @retval flash return data
*/
uint8_t spi_byte_write(uint8_t data)
{
uint8_t brxbuff;
spi_i2s_dma_transmitter_enable(SPI1, FALSE);
spi_i2s_dma_receiver_enable(SPI1, FALSE);
spi_i2s_data_transmit(SPI1, data);
while(spi_i2s_flag_get(SPI1, SPI_I2S_RDBF_FLAG) == RESET);
brxbuff = spi_i2s_data_receive(SPI1);
while(spi_i2s_flag_get(SPI1, SPI_I2S_BF_FLAG) != RESET);
return brxbuff;
}
/**
* @brief read a byte to flash
* @param none
* @retval flash return data
*/
uint8_t spi_byte_read(void)
{
return (spi_byte_write(FLASH_SPI_DUMMY_BYTE));
}
/**
* @}
*/
/**
* @}
*/
2.3、spi-flash.h
/**
**************************************************************************
* @file spi_flash.h
* @brief header file of spi_flash
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
#ifndef __SPI_FLASH_H
#define __SPI_FLASH_H
#include "at32l021.h"
/** @addtogroup AT32L021_periph_examples
* @{
*/
/** @addtogroup 021_SPI_w25q_flash
* @{
*/
/* use dma transfer spi data */
//#define SPI_TRANS_DMA
/** @defgroup SPI_flash_cs_pin_definition
* @{
*/
#define FLASH_CS_HIGH() gpio_bits_set(GPIOA, GPIO_PINS_15)
#define FLASH_CS_LOW() gpio_bits_reset(GPIOA, GPIO_PINS_15)
/**
* @}
*/
/** @defgroup SPI_flash_id_definition
* @{
*/
/*
* flash define
*/
#define W25Q80 0xEF13
#define W25Q16 0xEF14
#define W25Q32 0xEF15
#define W25Q64 0xEF16
/* 16mb, the range of address:0~0xFFFFFF */
#define W25Q128 0xEF17
/**
* @}
*/
/** @defgroup SPI_flash_operation_definition
* @{
*/
#define SPIF_CHIP_SIZE 0x1000000
#define SPIF_SECTOR_SIZE 4096
#define SPIF_PAGE_SIZE 256
#define SPIF_WRITEENABLE 0x06
#define SPIF_WRITEDISABLE 0x04
/* s7-s0 */
#define SPIF_READSTATUSREG1 0x05
#define SPIF_WRITESTATUSREG1 0x01
/* s15-s8 */
#define SPIF_READSTATUSREG2 0x35
#define SPIF_WRITESTATUSREG2 0x31
/* s23-s16 */
#define SPIF_READSTATUSREG3 0x15
#define SPIF_WRITESTATUSREG3 0x11
#define SPIF_READDATA 0x03
#define SPIF_FASTREADDATA 0x0B
#define SPIF_FASTREADDUAL 0x3B
#define SPIF_PAGEPROGRAM 0x02
/* block size:64kb */
#define SPIF_BLOCKERASE 0xD8
#define SPIF_SECTORERASE 0x20
#define SPIF_CHIPERASE 0xC7
#define SPIF_POWERDOWN 0xB9
#define SPIF_RELEASEPOWERDOWN 0xAB
#define SPIF_DEVICEID 0xAB
#define SPIF_MANUFACTDEVICEID 0x90
#define SPIF_JEDECDEVICEID 0x9F
#define FLASH_SPI_DUMMY_BYTE 0xA5
/**
* @}
*/
/** @defgroup SPI_flash_exported_functions
* @{
*/
void spiflash_init(void);
void spiflash_write(uint8_t *pbuffer, uint32_t write_addr, uint32_t length);
void spiflash_read(uint8_t *pbuffer, uint32_t read_addr, uint32_t length);
void spiflash_sector_erase(uint32_t erase_addr);
void spiflash_write_nocheck(uint8_t *pbuffer, uint32_t write_addr, uint32_t length);
void spiflash_page_write(uint8_t *pbuffer, uint32_t write_addr, uint32_t length);
void spi_bytes_write(uint8_t *pbuffer, uint32_t length);
void spi_bytes_read(uint8_t *pbuffer, uint32_t length);
void spiflash_wait_busy(void);
uint8_t spiflash_read_sr1(void);
void spiflash_write_enable(void);
uint16_t spiflash_read_id(void);
uint8_t spi_byte_write(uint8_t data);
uint8_t spi_byte_read(void);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif
2.4、main.c
#include "at32l021_clock.h"
#include "usart/usart.h"
#include "led/led.h"
#include "delay/delay.h"
#include "i2c/i2c.h"
#include "oled/oled.h"
#include "adc/adc.h"
#include "spiflash/spi_flash.h"
#define FLASH_TEST_ADDR 0x1000
#define SPI_BUF_SIZE 256
uint8_t tx_buffer[SPI_BUF_SIZE];
uint8_t rx_buffer[SPI_BUF_SIZE];
void tx_data_fill(void)
{
uint32_t data_index = 0;
for(data_index = 0; data_index < SPI_BUF_SIZE; data_index++)
{
tx_buffer[data_index] = data_index;
}
}
int main(void)
{
__IO uint32_t index = 0;
__IO uint32_t flash_id_index = 0;
system_clock_config();
init_usart(115200);
delay_init();
init_led();
printf("test\r\n");
tx_data_fill();
spiflash_init();
flash_id_index = spiflash_read_id();
if(flash_id_index !=0x5114)
{
printf("flash id check error!\r\n");
}
else
{
printf("flash id check success! id: %x\r\n", flash_id_index);
}
spiflash_sector_erase(FLASH_TEST_ADDR / SPIF_SECTOR_SIZE);
spiflash_write(tx_buffer, FLASH_TEST_ADDR, SPI_BUF_SIZE);
spiflash_read(rx_buffer, FLASH_TEST_ADDR, SPI_BUF_SIZE);
printf("Read Data: ");
for(index = 0; index < SPI_BUF_SIZE; index++)
{
printf("%x ", rx_buffer[index]);
}
while(1)
{
led2_tog();
delay_ms(200);
}
}
三、运行结果
串口输出读出的数据
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