GD32A490 I2S音频传输

只看该作者 · 2025-2-11 18:41

项目场景：
`GD32A490 I2S音频传输

例如：项目场景：使用CJC8988 CODEC芯片实现两路对功能

问题描述
`I2S DMA配置完接收不到数据

代码和文档说法不匹配
代码和文档说法不匹配，ADD_I2S只能是slave；其次,ADD_I2S配TX在内部会自动反向为RX;RX同理也是

/* configure I2S1 and I2S1_ADD */
i2s_init(SPI1, I2S_MODE_MASTERTX, I2S_STD_PHILLIPS, I2S_CKPL_LOW);
i2s_psc_config(SPI1, I2S_AUDIOSAMPLE_44K, I2S_FRAMEFORMAT_DT24B_CH32B, I2S_MCKOUT_ENABLE);
i2s_full_duplex_mode_config(I2S1_ADD, I2S_MODE_SLAVETX, I2S_STD_PHILLIPS, I2S_CKPL_LOW, I2S_FRAMEFORMAT_DT24B_CH32B);

I2S DMA中断上电后进一次发送接收中断然后也不再进中断了
需修改为循环模式
dma_init_struct.circular_mode    = DMA_CIRCULAR_MODE_ENABLE;

解决方案：
I2S DMA完整配置代码
/--------------注意！！发声噪音很饿大后修改：I2S_STD_PHILLIPS改为I2S_STD_MSB-----------------/

/*!
\brief    enable the peripheral clock
\param[in]  none
\param[out] none
\retval    none
*/
void I2S_rcu_config(void)
{
/* enable GPIOB clock */
rcu_periph_clock_enable(RCU_GPIOB);
/* enable GPIOB clock */
// rcu_periph_clock_enable(RCU_GPIOC);
/* enable I2C0 clock */
rcu_periph_clock_enable(RCU_SPI1);
/* enable DMA0 clock */
rcu_periph_clock_enable(RCU_DMA0);
}

/*!
\brief    configure the SPI peripheral
\param[in]  none
\param[out] none
\retval    none
*/
void I2S_gpio_config(void)
{
gpio_af_set(I2S1_WS_PORT, GPIO_AF_5, I2S1_WS_PIN);
gpio_af_set(I2S1_CK_PORT, GPIO_AF_5, I2S1_CK_PIN);
gpio_af_set(I2S1_ADD_SD_PORT, GPIO_AF_6, I2S1_ADD_SD_PIN);
gpio_af_set(I2S1_SD_PORT, GPIO_AF_5, I2S1_SD_PIN);
// gpio_af_set(I2S1_MCLK_PORT, GPIO_AF_5, I2S1_MCLK_PIN);

/* configure I2S1 and I2S1_ADD pins: I2S1_WS(PB12), I2S1_CK(PB13), I2S1_SD(PB15), I2S1_ADD_SD(PI2) */
gpio_mode_set(I2S1_WS_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, I2S1_WS_PIN | I2S1_CK_PIN | I2S1_ADD_SD_PIN | I2S1_SD_PIN);
gpio_output_options_set(I2S1_WS_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2S1_WS_PIN | I2S1_CK_PIN | I2S1_ADD_SD_PIN | I2S1_SD_PIN);

// gpio_mode_set(I2S1_MCLK_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, I2S1_MCLK_PIN);
// gpio_output_options_set(I2S1_MCLK_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2S1_MCLK_PIN);

}

void I2S_dma_config(void)
{
spi_i2s_deinit(SPI1);

/* configure I2S1 and I2S1_ADD */
i2s_init(SPI1, I2S_MODE_MASTERTX, I2S_STD_MSB, I2S_CKPL_LOW);
i2s_psc_config(SPI1, I2S_AUDIOSAMPLE_44K, I2S_FRAMEFORMAT_DT16B_CH16B, I2S_MCKOUT_ENABLE);
i2s_full_duplex_mode_config(I2S1_ADD, I2S_MODE_SLAVETX, I2S_STD_MSB, I2S_CKPL_LOW, I2S_FRAMEFORMAT_DT16B_CH16B);

// /* enable the I2S1 peripheral */
// i2s_enable(SPI1);
dma_single_data_parameter_struct dma_init_struct;

dma_single_data_para_struct_init(&dma_init_struct);

/* configure SPI1 transmit dma */
dma_deinit(DMA0, DMA_CH4);
dma_init_struct.periph_addr       = (uint32_t)&SPI_DATA(SPI1);
dma_init_struct.memory0_addr       = (uint32_t)i2s1_txbuffer;
dma_init_struct.direction          = DMA_MEMORY_TO_PERIPH;
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_16BIT;
dma_init_struct.priority          = DMA_PRIORITY_LOW;
dma_init_struct.number             = ARRAYSIZE;
dma_init_struct.periph_inc       = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.memory_inc       = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.circular_mode    = DMA_CIRCULAR_MODE_ENABLE;
dma_single_data_mode_init(DMA0, DMA_CH4, &dma_init_struct);
dma_channel_subperipheral_select(DMA0, DMA_CH4, DMA_SUBPERI0);

/* configure I2S1_ADD receive dma */
dma_deinit(DMA0, DMA_CH3);
dma_init_struct.periph_addr  = (uint32_t)&SPI_DATA(I2S1_ADD);
dma_init_struct.memory0_addr = (uint32_t)i2s1_rxbuffer;
dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_16BIT;
dma_init_struct.number             = ARRAYSIZE;
dma_init_struct.periph_inc       = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.memory_inc       = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.circular_mode    = DMA_CIRCULAR_MODE_ENABLE;
dma_init_struct.priority    = DMA_PRIORITY_HIGH;
dma_single_data_mode_init(DMA0, DMA_CH3, &dma_init_struct);

dma_channel_subperipheral_select(DMA0, DMA_CH3, DMA_SUBPERI3);
    dma_interrupt_enable(DMA0, DMA_CH4,DMA_CHXCTL_FTFIE);
dma_interrupt_enable(DMA0, DMA_CH3,DMA_CHXCTL_FTFIE);
nvic_priority_group_set(NVIC_PRIGROUP_PRE0_SUB4);
nvic_irq_enable(DMA0_Channel3_IRQn, 0, 1);
/* enable SPI DMA */
spi_dma_enable(I2S1_ADD, SPI_DMA_RECEIVE);
nvic_irq_enable(DMA0_Channel4_IRQn, 0, 1);
spi_dma_enable(SPI1, SPI_DMA_TRANSMIT);

  /* enbale I2S and I2S_ADD*/

i2s_enable(I2S1_ADD);
i2s_enable(SPI1);

dma_channel_enable(DMA0, DMA_CH4);
dma_channel_enable(DMA0, DMA_CH3);

}
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原文链接：https://blog.csdn.net/weixin_46029027/article/details/145517392